HDLbits：鼠标协议PS/2系列
一、前言
菜鸟总结刷hblbits的心得体会，有错误还请指正！
二、PS/2 packet parser
1、原题目
The PS/2 mouse protocol sends messages that are three bytes long. However, within a continuous byte stream, it's not obvious where messages start and end. The only indication is that the first byte of each three byte message always has bit[3]=1 (but bit[3] of the other two bytes may be 1 or 0 depending on data).
We want a finite state machine that will search for message boundaries when given an input byte stream. The algorithm we'll use is to discard bytes until we see one with bit[3]=1. We then assume that this is byte 1 of a message, and signal the receipt of a message once all 3 bytes have been received (done).
The FSM should signal done in the cycle immediately after the third byte of each message was successfully received.
2、设计思路
PS / 2鼠标协议发送3字节长的消息，并且第一个字节始终有bit [3] = 1，根据这个特点，可以使用一个FSM来区分连续的字节流中消息的边界。当给定输入字节流时，它将搜索消息边界。
我们将使用的设计方法是丢弃字节，直到我们看到bit [3]=1。然后我们假设这是消息的第1字节，并在所有3字节都被接收(完成)后发出接收信号。FSM应该在成功接收到每条消息的第3个字节后立即在周期内发出信号（done=1）。根据设计要求可以画出状态转换图如下所示：
分析：FSM每隔一个时钟周期对输入的in [7:0]信号进行检测，根据in[3]是否为1以及当前的状态可以得知下一状态。BYTE1状态包括所有error byte(in[3]=0)和消息的第1字节（in[3]=1)。DONE状态同时也属于BYTE1状态，只不过DONE状态还要输出一个done信号。
3、我的代码
module top_module(
input clk,
input [7:0] in,
input reset, // Synchronous reset
output done);
parameter BYTE1=2'd0,BYTE2=2'd1,BYTE3=2'd2,DONE=2'd3;
reg [1:0] state, next_state;
always @(*) begin // State transition logic (combinational)
case(state)
BYTE1: begin
if(in[3])
next_state = BYTE2;
else
next_state = BYTE1;
end
BYTE2: next_state = BYTE3;
BYTE3: next_state = DONE;
DONE: begin
if(in[3])
next_state = BYTE2;
else
next_state = BYTE1;
end
endcase
end
always @(posedge clk) begin // State flip-flops (sequential)
if(reset)
state <= BYTE1;
else
state <= next_state;
end
assign done = (state==DONE); // Output logic
endmodule三、PS/2 packet parser and datapath
1、原题
Now that you have a state machine that will identify three-byte messages in a PS/2 byte stream, add a datapath that will also output the 24-bit (3 byte) message whenever a packet is received (out_bytes[23:16] is the first byte, out_bytes[15:8] is the second byte, etc.).
out_bytes needs to be valid whenever the done signal is asserted. You may output anything at other times (i.e., don't-care).
2、设计思路
相比于PS/2 packet parser，需要增加一个24bits的寄存器q来寄存每个时钟周期内输入的in信号。其中q[23:16]用来寄存状态为BYTE1和DONE时的in信号，q[15:8]用来寄存状态为BYTE2时的in信号，q [7:0]用来寄存状态为BYTE3时的in信号。
3、我的代码
module top_module(
input clk,
input [7:0] in,
input reset, // Synchronous reset
output [23:0] out_bytes,
output done); //
// FSM from fsm_ps2
parameter BYTE1=2'd0,BYTE2=2'd1,BYTE3=2'd2,DONE=2'd3;
reg [1:0] state, next_state;
always @(*) begin // State transition logic (combinational)
case(state)
BYTE1: begin
if(in[3]) begin
next_state = BYTE2;
end
else
next_state = BYTE1;
end
BYTE2: begin
next_state = BYTE3;
end
BYTE3: begin
next_state = DONE;
end
DONE: begin
if(in[3])
next_state = BYTE2;
else
next_state = BYTE1;
end
endcase
end
always @(posedge clk) begin // State flip-flops (sequential)
if(reset)
state <= BYTE1;
else
state <= next_state;
end
// Output logic
always @(posedge clk) begin // New: Datapath to store incoming bytes.
case(state)
BYTE1: out_bytes[23:16] <= in;
BYTE2: out_bytes[15:8] <= in;
BYTE3: out_bytes[7:0] <= in;
DONE: out_bytes[23:16] <= in;
endcase
end
assign done = (state==DONE);
endmodule
知识拓展：PS/2接口
PS/2是在较早电脑上常见的接口之一，用于鼠标、键盘等设备。
PS/2的命名来自于1987年时IBM所推出的个人电脑：PS/2系列。
PS/2接口是输入装置接口，而不是传输接口。所以PS2口没有传输速率的概念，只有扫描速率。在Windows环境下，PS/2鼠标的采样率默认为60次/秒，USB鼠标的采样率为120次/秒。较高的采样率理论上可以提高鼠标的移动精度。PS/2接口设备不支持热插拔，强行带电插拔有可能烧毁主板。
1984年IBM推出了IBM AT键盘接口标准，该标准定义了84~101键，采用5脚DIN连接器和双向串行通讯协议，设有8个主机到键盘的命令。
1987年，IBM又推出了PS/2键盘接口标准。该标准仍旧定义了84~101键，但是采用6脚mini-DIN连接器，支持17个主机到键盘的命令。
具有五脚连接器的键盘称之为AT键盘，而具有六脚mini-DIN连接器的键盘则称之为PS/2键盘
