UART初始化

device/rockchip/common/ueventd.rockchip.rc

#for UART
/dev/ttyS0                0666   root  root
/dev/ttyS1                0666   root  root
/dev/ttyS3                0666   root  root
/dev/ttyS4                0666   root  root
/dev/ttyCOM*                0666   root  root

dts配置，下面是px30，打开对应uart

kernel/arch/arm64/boot/dts/rockchip/px30-evb-ddr3-lvds-v10.dts

&uart0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_xfer>;
};

&uart1 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_xfer>;
};

&uart3 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart3m0_xfer>;
};

&uart4 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart4_xfer>;
};

kernel/arch/arm64/boot/dts/rockchip/px30.dtsi

	uart0: serial@ff030000 {
		compatible = "rockchip,px30-uart", "snps,dw-apb-uart";
		reg = <0x0 0xff030000 0x0 0x100>;
		interrupts = ;
		clocks = <&pmucru SCLK_UART0_PMU>, <&pmucru PCLK_UART0_PMU>;
		clock-names = "baudclk", "apb_pclk";
		reg-shift = <2>;
		reg-io-width = <4>;
		dmas = <&dmac 0>, <&dmac 1>;
		pinctrl-names = "default";
		pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
		status = "disabled";
	};

		uart0 {
			uart0_xfer: uart0-xfer {
				rockchip,pins =
					<0 RK_PB2 RK_FUNC_1 &pcfg_pull_up>,
					<0 RK_PB3 RK_FUNC_1 &pcfg_pull_up>;
			};

			uart0_cts: uart0-cts {
				rockchip,pins =
					<0 RK_PB4 RK_FUNC_1 &pcfg_pull_none>;
			};

			uart0_rts: uart0-rts {
				rockchip,pins =
					<0 RK_PB5 RK_FUNC_1 &pcfg_pull_none>;
			};

			uart0_rts_gpio: uart0-rts-gpio {
				rockchip,pins =
					<0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
			};
		};