Rockchip RK3588 MIPI DSI 显示驱动调试记录

        RK3588 有两路 MIPI DSI 显示输出接口，均支持 DPHY2.0 和 4 Lane 的数据输出，最高可输出 4096x2304@60Hz（取决于连接的 Portx）。

调试步骤：

1、LCD背光配置

&backlight {
	pwms = <&pwm1 0 25000 0>;
	status = "okay";
};

&pwm1 {
	/* mipi lcd backlight: pwm1_m1 */
	pinctrl-0 = <&pwm1m1_pins>;
	status = "okay";
};

2、配置DPHY（根据硬件使用的DPHY进行配置）

&mipi_dcphy0 {
	status = "okay";
};

&mipi_dcphy1 {
	status = "disabled";
};

3、配置dsi0连接的Port（把 dsi0 连接在 Port3 上）

/*
 * mipi_dcphy0 needs to be enabled
 * when dsi0 is enabled
 */
&dsi0 {
	status = "okay";
};

&dsi0_in_vp2 {
	status = "disabled";
};

&dsi0_in_vp3 {
	status = "okay";
};

4、设置dsi0开机logo

&route_dsi0 {
	status = "okay";
	connect = <&vp3_out_dsi0>;
};

&route_dsi1 {
	status = "disabled";
	connect = <&vp3_out_dsi1>;
};

5、配置dsi0（重点配置屏幕的上电时序，一般由屏厂提供）

&dsi0 {
	status = "disabled";
	//rockchip,lane-rate = <1000>;
	dsi0_panel: panel@0 {
		status = "disabled";
		/* compatible = "sitronix,st7703", "simple-panel-dsi"; */
		compatible = "simple-panel-dsi";
		reg = <0>;

		/* 选择之前的配置的背光节点 */
        backlight = <&backlight>;

		/* 设置 LCD 屏幕的上下电时序 */
        init-delay-ms = <60>;
		reset-delay-ms = <60>;
		enable-delay-ms = <60>;
		prepare-delay-ms = <60>;
		unprepare-delay-ms = <60>;
		disable-delay-ms = <60>;
		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
			MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
		dsi,format = ;
		dsi,lanes  = <4>;
		
		/* 设置 MIPI DSI 的上电指令 */
        panel-init-sequence = [
			13 78 02 ee 50
			23 00 03 ea	85 55
			13 00 02 30 00
			29 00 04 39 02 07 10
			...
			13 00 02 ee 00
			13 00 02 36 08
			05 78 01 11
			05 14 01 29
		];
        
        /* //设置 MIPI DSI 的下电指令 */
		panel-exit-sequence = [
			05 00 01 28
			05 00 01 10
		];

		/* 设置 LCD 屏幕的显示时序（该部分内容一般都可以从对应屏幕的 datasheet 中获取） */
        disp_timings0: display-timings {
			native-mode = <&dsi0_timing0>;
			dsi0_timing0: timing0 {
				clock-frequency = <60000000>;
				hactive = <800>;
				vactive = <1280>;
				hfront-porch = <14>;
				hsync-len = <12>;
				hback-porch = <12>;
				vfront-porch = <12>;
				vsync-len = <4>;
				vback-porch = <8>;
				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <0>;
				pixelclk-active = <0>;
			};
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				panel_in_dsi: endpoint {
					remote-endpoint = <&dsi_out_panel>;
				};
			};
		};
	};

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@1 {
			reg = <1>;
			dsi_out_panel: endpoint {
				remote-endpoint = <&panel_in_dsi>;
			};
		};
	};

};