DLPC6540简介--DLPC入门1

1. Application block diagram

2. Component & Pin package

3. Signal definition
   3.1, Initialization, Board Level Test and Debug: Pwr signal, Reset, JTAG, Test pin
   3.2, Analog front end(not supported in DLPC6540)
   3.2, V-by-one interface input data and control(HS video input): VX1_0~7_P/N, VX1_HOTPDN(RSD), VX1_LOCKN(RSD),
   VX1_CM_CKREF0~3(RSD), VX1_CM_AMOUT0~3(RSD)
   3.3, OpenLDI(FPD-LINK I)(not supported in DLPC6540)
   3.4, Parallel Port input data and control(RSD)
   3.5, DMD Reset and low speed inteface
   3.6, DMD HSSI(high speed serial interface)
   3.7, Program Memory Interface: PM_CSZ_0~2(Chip Select)， PM_ADDR0_23, PM_WEZ(write enable), PM_OEW(output
   enable), PM_BLSZ0~1(lower byte/upper byte),PM_DATA0~15
   3.8, Peripheral Interface: I2C, SPI, UART, USB
   3.9, GPIO:GPIO87~00
   3.10, Clock and support:REFCLKA_I, REFCLKA_O(crystal A),REFCLKB_I,REFCLKB_O(crystal B),OCLKA
   3.11, Power and Ground: 1.15V, 1.8V, 3.3V, 1.21V,

4. Feature Description
   4.1, Input source, Vx1
   4.2, ?Processing delay