WinCE Eboot中加入Linux boot的支持

Index: flash.c
===================================================================
--- flash.c    (revision 1804)
+++ flash.c    (working copy)
@@ -26,6 +26,8 @@
#include "ebootnand.h"
#include "ll_nand.h"
#include "loader.h"
+#include "setup.h"
+
extern DWORD g_ImageType;
extern MultiBINInfo g_BINRegionInfo;
extern DWORD CEchecksum;
@@ -223,6 +225,11 @@
*/
LPBYTE OEMMapMemAddr(DWORD dwImageStart, DWORD dwAddr)
{
+    if (g_ImageType & IMAGE_TYPE_zImage)
+    {
+        dwAddr = ((0x83a00000 | CACHED_TO_UNCACHED_OFFSET)  + (dwAddr - 0));
+        return (LPBYTE)dwAddr;
+    }
     if (g_ImageType & IMAGE_TYPE_STEPLDR)
     {
         dwAddr = (FILE_CACHE_START + (dwAddr - STEPLDR_RAM_IMAGE_BASE));
@@ -522,6 +529,10 @@
             {
                 OALMSG(TRUE, (TEXT("[ERR] FIL Erase Error @ %d block/r/n"), dwPage / PAGES_PER_BLOCK));
                 OALMSG(TRUE, (TEXT("Write Steploader image to BootMedia Failed !!!/r/n")));
+                while(1)
+                    {
+                    red_printk(TEXT("OEMWriteSuperIPL [ERR] FIL Erase Error @ %d block/r/n"), dwPage / PAGES_PER_BLOCK);
+                    }
                 return FALSE;
             }
         }
@@ -541,6 +552,10 @@
         {
             OALMSG(TRUE, (TEXT("[ERR] FIL Write Error @ %d page/r/n"), dwPage));
             OALMSG(TRUE, (TEXT("Write Steploader image to BootMedia Failed !!!/r/n")));
+            while(1)
+                {
+                red_printk (TEXT("OEMWriteSuperIPL [ERR] FIL Write Error @ %d page/r/n"), dwPage);
+                }
             return FALSE;
         }
         dwPage++;
@@ -574,6 +589,10 @@
         {
             OALMSG(TRUE, (TEXT("[ERR] FIL Write Error @ %d page/r/n"), PAGES_PER_BLOCK - 2));
             OALMSG(TRUE, (TEXT("Write Steploader image to BootMedia Failed !!!/r/n")));
+            while(1)
+                {
+                red_printk (TEXT("OEMWriteSuperIPL WMR[ERR] FIL Write Error @ %d page/r/n"), PAGES_PER_BLOCK - 2);
+                }
             return FALSE;
         }
         else
@@ -584,6 +603,10 @@
             {
                 OALMSG(TRUE, (TEXT("[ERR] FIL Write Error @ %d page/r/n"), PAGES_PER_BLOCK - 1));
                 OALMSG(TRUE, (TEXT("Write Steploader image to BootMedia Failed !!!/r/n")));
+                while(1)
+                {
+                red_printk (TEXT("OEMWriteSuperIPL WMR2[ERR] FIL Write Error @ %d page/r/n"), PAGES_PER_BLOCK - 1);
+                }
                 return FALSE;
             }
         }
@@ -630,6 +653,11 @@
         {
             OALMSG(TRUE, (TEXT("Write RAW image to BootMedia Failed !!!/r/n")));
             OALMSG(TRUE, (TEXT("Too many Bad Block/r/n")));
+            while(1)
+                {
+                red_printk (TEXT("Too many Bad Block/r/n"));
+                }
+
             return (FALSE);
         }
@@ -666,6 +694,7 @@
             if ( nRet != FIL_SUCCESS)
             {
                 OALMSG(TRUE, (TEXT("[ERR] FIL Erase Error @ %d block, Skipped/r/n"), dwBlock));
+                red_printk (TEXT("OEMWriteEboot [ERR] FIL Erase Error @ %d block, Skipped/r/n"), dwBlock);
                 goto MarkAndSkipBadBlock;
             }
             for (dwPageOffset = 0; dwPageOffset < PAGES_PER_BLOCK; dwPageOffset++)
@@ -678,6 +707,7 @@
                 if (nRet != FIL_SUCCESS)
                 {
                     OALMSG(TRUE, (TEXT("[ERR] FIL Write Error @ %d Block %d Page, Skipped/r/n"), dwBlock, dwPageOffset));
+                    red_printk (TEXT("OEMWriteEboot [ERR] FIL Write Error @ %d Block %d Page, Skipped/r/n"), dwBlock, dwPageOffset);
                     goto MarkAndSkipBadBlock;
                 }
@@ -685,12 +715,14 @@
                 if (nRet != FIL_SUCCESS)
                 {
                     OALMSG(TRUE, (TEXT("[ERR] FIL Read Error @ %d Block %d Page, Skipped/r/n"), dwBlock, dwPageOffset));
+                    red_printk (TEXT("OEMWriteEboot [ERR] FIL Read Error @ %d Block %d Page, Skipped/r/n"), dwBlock, dwPageOffset);
                     goto MarkAndSkipBadBlock;
                 }
                 if (0 != memcmp(pbBuffer + BYTES_PER_MAIN_PAGE*dwPageOffset, pMBuf, BYTES_PER_MAIN_PAGE))
                 {
                     OALMSG(TRUE, (TEXT("[ERR] Verify Error @ %d Block %d Page, Skipped/r/n"), dwBlock, dwPageOffset));
+                    red_printk (TEXT("OEMWriteEboot [ERR] Verify Error @ %d Block %d Page, Skipped/r/n"), dwBlock, dwPageOffset);
                     goto MarkAndSkipBadBlock;
                 }
             }
@@ -868,7 +900,77 @@
     return TRUE;
}
+struct _my_tag
+{
+    //core
+    struct tag_header hcore;
+    struct tag_core  core;
+    //memory
+    struct tag_header hmem;
+    struct tag_mem32  mem;
+    //none
+    struct tag_header hnone;
+}my_tags={
+    //core
+    {
+        ATAG_CORE,
+        (sizeof(struct tag_header)+sizeof(struct tag_core))>>2
+    },
+    {
+        1,
+        0x1000,//4K
+        0
+    },
+    //mem
+        {
+        ATAG_MEM,
+        (sizeof(struct tag_header)+sizeof(struct tag_mem32))>>2
+    },
+    {
+        0x4000000,//64M
+        0x30000000,//SDRAM base address
+    },
+    //none
+    {
+        ATAG_NONE,
+        0
+    }
+};
+extern void JumptoLin(DWORD base,DWORD patag);
+BOOL OEMWritezImage(DWORD dwImageStart, DWORD dwImageLength)
+{
+    LPBYTE pbBuffer;
+    LPDWORD pMagicNumber;
+    pbBuffer = OEMMapMemAddr(dwImageStart, dwImageStart);
+    printk(L"0x%x/r/n",pbBuffer);
+    //check magic number
+    pMagicNumber=(LPDWORD)pbBuffer;
+    if(*(pMagicNumber+9)==0x016f2818)
+    {
+        green_printk(L"magic number is OK/r/n");
+    }
+    else
+    {
+        red_printk(L"magic number fail/r/n");
+    }
+
+    // Prepare
+    memcpy((LPVOID)0x30000100,(LPVOID)&my_tags,sizeof(my_tags));
+   
+    (DWORD)pbBuffer&=0x0FFFFFFF;
+    (DWORD)pbBuffer|=0x30000000;
+    printk(L"ready to jump 0x%x/r/n",pbBuffer);
+   
+    while(GetGPIOLevel(GPIO_KEY_LOCK_SOC) != GPIO_LOW)
+    {
+            EdbgOutputDebugString("GPStest/r/n");
+    }
+   
+
+    JumptoLin((DWORD)pbBuffer,0x30000100);
+    while(1);
+}
/*
     @func   BOOL | OEMWriteFlash | Writes data to flash (the source location is determined using OEMMapMemAddr).
     @rdesc  TRUE = Success, FALSE = Failure.
@@ -889,6 +991,10 @@
     EdbgOutputDebugString("OEMWriteFlash 0x%x /r/n", g_ImageType);
     switch (g_ImageType)
     {
+    case IMAGE_TYPE_zImage:
+        green_printk(L"start zImage/r/n");
+        rc = OEMWritezImage(dwStartAddr, dwLength);
+        break;
     case IMAGE_TYPE_DIO:
         rc = TRUE;
         break;
Index: main.c
===================================================================
--- main.c    (revision 1804)
+++ main.c    (working copy)
@@ -467,6 +467,14 @@
         g_ImageType = IMAGE_TYPE_BOOTLOADERTOTAL;     // Uboot image.
         return TRUE;
     }
+    else if ((dwStartAddr == 0) &&
+             ((dwStartAddr + dwLength - 1) > 0x100000) &&
+             ((dwStartAddr + dwLength - 1) < 0x300000))
+    {
+        printk(TEXT("zImage/r/n"));
+        g_ImageType = IMAGE_TYPE_zImage;     // zImage image.
+        return TRUE;
+    }
     else if (!dwStartAddr && !dwLength)
     {
         OALMSG(TRUE, (TEXT("Don't support raw image/r/n")));
Index: setup.h
===================================================================
--- setup.h    (revision 0)
+++ setup.h    (revision 0)
@@ -0,0 +1,222 @@
+/*
+ *  linux/include/asm/setup.h
+ *
+ *  Copyright (C) 1997-1999 Russell King
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ *  Structure passed to kernel to tell it about the
+ *  hardware it's running on.  See Documentation/arm/Setup
+ *  for more info.
+ */
+#ifndef __ASMARM_SETUP_H
+#define __ASMARM_SETUP_H
+
+#define COMMAND_LINE_SIZE 1024
+
+typedef  unsigned char  u8;
+typedef unsigned short u16;
+typedef unsigned long u32;
+
+/* The list ends with an ATAG_NONE node. */
+#define ATAG_NONE    0x00000000
+
+struct tag_header {
+    u32 size;
+    u32 tag;
+};
+
+/* The list must start with an ATAG_CORE node */
+#define ATAG_CORE    0x54410001
+
+struct tag_core {
+    u32 flags;        /* bit 0 = read-only */
+    u32 pagesize;
+    u32 rootdev;
+};
+
+/* it is allowed to have multiple ATAG_MEM nodes */
+#define ATAG_MEM    0x54410002
+
+struct tag_mem32 {
+    u32    size;
+    u32    start;    /* physical start address */
+};
+
+/* VGA text type displays */
+#define ATAG_VIDEOTEXT    0x54410003
+
+struct tag_videotext {
+    u8        x;
+    u8        y;
+    u16        video_page;
+    u8        video_mode;
+    u8        video_cols;
+    u16        video_ega_bx;
+    u8        video_lines;
+    u8        video_isvga;
+    u16        video_points;
+};
+
+/* describes how the ramdisk will be used in kernel */
+#define ATAG_RAMDISK    0x54410004
+
+struct tag_ramdisk {
+    u32 flags;    /* bit 0 = load, bit 1 = prompt */
+    u32 size;    /* decompressed ramdisk size in _kilo_ bytes */
+    u32 start;    /* starting block of floppy-based RAM disk image */
+};
+
+/* describes where the compressed ramdisk image lives (virtual address) */
+/*
+ * this one accidentally used virtual addresses - as such,
+ * it's deprecated.
+ */
+#define ATAG_INITRD    0x54410005
+
+/* describes where the compressed ramdisk image lives (physical address) */
+#define ATAG_INITRD2    0x54420005
+
+struct tag_initrd {
+    u32 start;    /* physical start address */
+    u32 size;    /* size of compressed ramdisk image in bytes */
+};
+
+/* board serial number. "64 bits should be enough for everybody" */
+#define ATAG_SERIAL    0x54410006
+
+struct tag_serialnr {
+    u32 low;
+    u32 high;
+};
+
+/* board revision */
+#define ATAG_REVISION    0x54410007
+
+struct tag_revision {
+    u32 rev;
+};
+
+/* initial values for vesafb-type framebuffers. see struct screen_info
+ * in include/linux/tty.h
+ */
+#define ATAG_VIDEOLFB    0x54410008
+
+struct tag_videolfb {
+    u16        lfb_width;
+    u16        lfb_height;
+    u16        lfb_depth;
+    u16        lfb_linelength;
+    u32        lfb_base;
+    u32        lfb_size;
+    u8        red_size;
+    u8        red_pos;
+    u8        green_size;
+    u8        green_pos;
+    u8        blue_size;
+    u8        blue_pos;
+    u8        rsvd_size;
+    u8        rsvd_pos;
+};
+
+/* command line: /0 terminated string */
+#define ATAG_CMDLINE    0x54410009
+
+struct tag_cmdline {
+    char    cmdline[1];    /* this is the minimum size */
+};
+
+/* acorn RiscPC specific information */
+#define ATAG_ACORN    0x41000101
+
+struct tag_acorn {
+    u32 memc_control_reg;
+    u32 vram_pages;
+    u8 sounddefault;
+    u8 adfsdrives;
+};
+
+/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
+#define ATAG_MEMCLK    0x41000402
+
+struct tag_memclk {
+    u32 fmemclk;
+};
+
+struct tag {
+    struct tag_header hdr;
+    union {
+        struct tag_core        core;
+        struct tag_mem32    mem;
+        struct tag_videotext    videotext;
+        struct tag_ramdisk    ramdisk;
+        struct tag_initrd    initrd;
+        struct tag_serialnr    serialnr;
+        struct tag_revision    revision;
+        struct tag_videolfb    videolfb;
+        struct tag_cmdline    cmdline;
+
+        /*
+         * Acorn specific
+         */
+        struct tag_acorn    acorn;
+
+        /*
+         * DC21285 specific
+         */
+        struct tag_memclk    memclk;
+    } u;
+};
+
+struct tagtable {
+    u32 tag;
+    int (*parse)(const struct tag *);
+};
+
+#define __tag __attribute_used__ __attribute__((__section__(".taglist")))
+#define __tagtable(tag, fn) /
+static struct tagtable __tagtable_##fn __tag = { tag, fn }
+
+#define tag_member_present(tag,member)                /
+    ((unsigned long)(&((struct tag *)0L)->member + 1)    /
+        <= (tag)->hdr.size * 4)
+
+#define tag_next(t)    ((struct tag *)((u32 *)(t) + (t)->hdr.size))
+#define tag_size(type)    ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
+
+#define for_each_tag(t,base)        /
+    for (t = base; t->hdr.size; t = tag_next(t))
+
+/*
+ * Memory map description
+ */
+#ifdef CONFIG_ARCH_LH7A40X
+# define NR_BANKS 16
+#else
+# define NR_BANKS 8
+#endif
+
+struct meminfo {
+    int nr_banks;
+    struct {
+        unsigned long start;
+        unsigned long size;
+        int           node;
+    } bank[NR_BANKS];
+};
+
+/*
+ * Early command line parameters.
+ */
+struct early_params {
+    const char *arg;
+    void (*fn)(char **p);
+};
+
+#define __early_param(name,fn)                    /
+static struct early_params __early_##fn __attribute_used__    /
+__attribute__((__section__("__early_param"))) = { name, fn }
+
+#endif
Index: sources
===================================================================
--- sources    (revision 1804)
+++ sources    (working copy)
@@ -39,7 +39,7 @@
     $(_COMMONOAKROOT)/lib/$(_CPUINDPATH)/ddk_io.lib           /
     $(_COMMONOAKROOT)/lib/$(_CPUINDPATH)/gsnull.lib           /
     $(_COMMONOAKROOT)/lib/$(_CPUINDPATH)/fulllibc.lib          /
-      $(_TARGETPLATROOT)/src/Whimory/Lib/$(_TGTCPU)/$(WINCEDEBUG)/$(WMR_FIL)_$(WMR_NAND_SUPPORT)_FIL.lib    /
+      $(_TARGETPLATROOT)/src/Whimory/Lib/$(_TGTCPU)/$(WINCEDEBUG)/$(WMR_FIL)_$(WMR_NAND_SUPPORT)_FIL_BOOT.lib    /
       $(_TARGETPLATROOT)/src/Whimory/Lib/$(_TGTCPU)/$(WINCEDEBUG)/FTL_$(WMR_NAND_SUPPORT).lib        /
       $(_TARGETPLATROOT)/src/Whimory/Lib/$(_TGTCPU)/$(WINCEDEBUG)/VFL_$(WMR_NAND_SUPPORT).lib        /
       $(_TARGETPLATROOT)/src/Whimory/Lib/$(_TGTCPU)/$(WINCEDEBUG)/EbootWMROAM.lib    /
Index: startup.s
===================================================================
--- startup.s    (revision 1804)
+++ startup.s    (working copy)
@@ -765,7 +765,46 @@
;    bic        r1, r1, #(0x1<<12)    ; DVS_EN bit = 0(FCLK = MPLL clock)
;    str        r1, [r0]
;    mov        pc, lr
+
+    LEAF_ENTRY JumptoLin
+    ;backup parameter0,1
+    mov    r4,r0
+    mov    r5,r1
+
+    ldr    r2, = PhysicalStart_n
+    ldr    r3, = (0x80000000 - 0x30000000)
+
+    sub    r2, r2, r3
+    mrc     p15, 0, r1, c1, c0, 0
+    bic     r1, r1, #0x0001             ; Disable MMU
+    mcr     p15, 0, r1, c1, c0, 0
+
+
+    ;mov     r1, #0x0070             ; Disable MMU
+    ;mcr     p15, 0, r1, c1, c0, 0
+   
+    nop
+    mov     pc, r2                  ; Jump to PStart
+    nop
+
+    ; MMU & caches now disabled.
+
+PhysicalStart_n
+
+    mov     r2, #0
+    mcr     p15, 0, r2, c8, c7, 0   ; Flush the TLB
+    ;mov     pc, r0            ; Jump to program we are launching.
+    ;write Uart2
+    mov    r0, #0x50000000
+    add    r0, r0, #0x4000 * 2
+    mov    r1,#0x23    ; '#'
+    strb     r1, [r0, #0x20 ]
+    ;
+    mov    r0, #0
+    ldr    r1,=0x43c        ;s3c2443 machine code 43c,3ED
+    mov    r2,r5
+    mov    pc,r4
         END
;------------------------------------------------------------------------------