Reading notes of 'The Art of Multiprocessor Programming' -- Chapter 1 & Appendix B

Reading notes of 'The Art of Multiprocessor Programming'

---------------------------  Chapter 1 Introduction------------
-  A final goal of the part of the book dealing with principles is to introduce a variety of metrologies and
    approaches for reasoning about   concurrent programs, which will later serve us when discussing
     the correctness of real-world objects and programs.
-   The problem of making sure that only one thread at a time can execute a particular block of code is
    called the mutual exclusion problem
- Pg8<6>(To prove that the pets will never be in the yard together)Mothed
-   Properties of Mutual Exclusion
   -- mutual exclusion  
       * deadlock-freedom property
   -- starvation-freedom / lockout-freedom
   -- waiting
- Two kinds of communication occur naturally in concurrent systems:
    -- Transient communication requires both parties to participate at the same time
    -- Persistent communication allows the sender and receiver to participate at different times
        //Mutual exclusion requires persistent communication.
  - how we reason about a protocol ? Pg11<8>
 - Amdahl’s Law:
    --  Define the speedup S of a job to be the ratio between the time it takes one
      processor to complete the job (as measured by a wall clock) versus the time it takes
      n concurrent processors to complete the same job.
      S = 1 / (1 - p + p / n)
      
    It captures the notion that the extent to which we can speed up any complex job is limited by how
    much of the job must be executed sequentially.
 

-----------------------   Appendix  B: Hardware Basics

    *  Almost everything we examine  is the result of trying to alleviate the long time it takes (“high latency”)
       to access memory.
    *  -  In an SMP architecture, processors and memory are linked by a bus interconnect, a broadcast
            medium that acts like a tiny Ethernet.
        -    In a NUMA architecture, a collection of nodes are linked by a point-to-point network, like a tiny
              local area network. Each node contains one or more processors and a local memory.  a
               processor can access memory residing on its own node faster than it can access
             memory residing on other nodes.
    * Caches:    We would like the cache to maintain values of the most highly used locations.
    * Coherence: - MESI protocol (pronounced “messy”)
                            -  The likelihood of false sharing can be reduced by ensuring that data objects that
                                might be accessed concurrently by independent threads lie far enough apart in
                                memory.(To avoid False sharing )
     * Spinning :  - On an SMP architecture without caches, spinning is a very bad idea. Each time the
                             processor reads the memory, it consumes bus bandwidth without accomplishing any
                             useful work.
                          -   On a NUMA architecture without caches, spinning may be acceptable if the address
                                in question resides in the  processor’s local memory.
                          -  On an SMP or NUMA architecture with caches, spinning consumes significantly fewer
                              resources. (local spinning)
      * Multi-Core and Multi-Threaded Architectures
      * Relaxed Memory Consistency:
            - When a processor writes a value to memory, that value is kept in the cache and marked as
                    dirty are collected in a hardware queue, called a write buffer. (batching, write absorption)
            -    The use of write buffers has a very important consequence: the order in which reads–writes
                 are issued to memory is not necessarily the order in which they occur in the memory.
                 ( memory barrier instruction)
       * Hardware Synchronization Instructions:
             -  cmpxchg
             - ABA problem ?????