【转】6410的DVFS和SLEEP

6410真正做DVFS和SLEEP是需要硬件支持的:

  • 在sleep模式下VCCARM,VCCINT,VCCPLL是shutdown的。
  • SLEEP mode disconnects the internal power. Therefore, the power consumption due to CPU and the internal logic except the wakeup logic will be zero. In order to use the SLEEP mode two independent power sources are required. One of the two power sources supplies the power for the wake-up logic. The other one supplies the other internal logic including CPU, and must be controlled in order to be turned ON/OFF. In SLEEP mode, the second power supply source for the CPU and internal logic will be turned off.
  •  SLEEP mode entering sequence is as follows:
    1. User software sets PWR_CFG[6:5] as SLEEP mode
    2. User software generates STANDBYWFI signal by MCR instruction (MCR p15, 0, Rd, c7, c0, 4)
    3. SYSCON requests bus controller to finish current AHB bus transaction
    4. AHB bus controller sends acknowledge to SYSCON after current bus transaction is completed.
    5. SYSCON requests DOMAIN-V to finish current AXI-bus transaction.
    6. AXI bus controller sends acknowledge to SYSCON after current bus transaction is completed.
    7. SYSCON requests external memory controllers to enter into self-refresh mode, since the contents in the
    external memory must be preserved during SLEEP mode.
    8. The memory controllers send acknowledges when they are self-refresh mode.
    9. SYSCON changes clock source from PLL output to external oscillator if PLL is used.
    10. SYSCON disables PLL operations and crystal oscillator.
    11. Finally, SYSCON disables an external power source for internal logic by asserting XPWRRGTON pin to low
    state. XPWRRGTON signal controls an external regulator.
    The exiting sequence is as follows:
    1. SYSCON enables an external power source by asserting XPWRRGTON pin to high state and waits for the
    stable time, which is configured by PWR_STABLE.
    2. SYSCON generates system clocks including HCLK, PCLK, and ARMCLK.
    3. SYSCON releases system reset signals including HRESETn and PRESETn.
    4. SYSCON releases ARM reset signals.

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