/* *gzsd add */ #include<regs.h> #include <common.h> #include <asm/io.h> #ifdef CONFIG_GZSD210_LCD static void set_cs(int cs) { int reg; reg = readl(GPF1DAT); reg &= ~(0x1 << 5); reg |= (cs << 5); writel(reg,GPF1DAT); } static void set_clk(int clk) { int reg; reg = readl(GPF1DAT); reg &= ~(0x1 << 4); reg |= (clk << 4); writel(reg,GPF1DAT); } static void set_outdata(int outdata) { int reg; #if 0 reg = readl(GPF0CON); reg &= ~(0xf << 20); reg |= (0x1<< 20); writel(reg,GPF0CON); reg = readl(GPF0DAT); reg &= ~(0x1 << 5); reg |= (outdata << 5); writel(reg,GPF0DAT); #else reg = readl(GPF0DAT); reg &= ~(0x1 << 6); reg |= (outdata << 6); writel(reg,GPF0DAT); #endif } static void send_data(unsigned int data) { unsigned int i; int clk_num; int clk_mask; set_cs(0); udelay(10); set_clk(1); set_outdata(1); udelay(10); clk_num = 9; clk_mask = 0x100; udelay(50); for(i = 0; i < clk_num; ++i){ set_clk(0); if(data & clk_mask){ set_outdata(1); } else{ set_outdata(0); } udelay(100); set_clk(1); udelay(100); data <<= 1; } set_outdata(1); set_cs(1); } static void hx8369_write_cmd(unsigned int cmd) { unsigned int out; out = (cmd & 0xFF); send_data(out); } static void hx8369_write_data(unsigned int data) { unsigned int out = (data & 0xFF) | 0x100; send_data(out); } static void set_hx8369(void) { hx8369_write_cmd(0xB9); // SET password hx8369_write_data(0xFF); hx8369_write_data(0x83); hx8369_write_data(0x69); hx8369_write_cmd(0xB1); //Set Power hx8369_write_data(0x01); hx8369_write_data(0x00); hx8369_write_data(0x34); hx8369_write_data(0x06); hx8369_write_data(0x00); hx8369_write_data(0x11); hx8369_write_data(0x11); hx8369_write_data(0x2A); hx8369_write_data(0x32); hx8369_write_data(0x3F); hx8369_write_data(0x3F); hx8369_write_data(0x07); hx8369_write_data(0x23); hx8369_write_data(0x01); hx8369_write_data(0xE6); hx8369_write_data(0xE6); hx8369_write_data(0xE6); hx8369_write_data(0xE6); hx8369_write_data(0xE6); hx8369_write_cmd(0xB2); // SET Display 480x800 hx8369_write_data(0x00); hx8369_write_data(0x2B); hx8369_write_data(0x03); hx8369_write_data(0x03); hx8369_write_data(0x70); hx8369_write_data(0x00); hx8369_write_data(0xFF); hx8369_write_data(0x00); hx8369_write_data(0x00); hx8369_write_data(0x00); hx8369_write_data(0x00); hx8369_write_data(0x03); hx8369_write_data(0x03); hx8369_write_data(0x00); hx8369_write_data(0x01); hx8369_write_cmd(0xB4); // SET Display 480x800 hx8369_write_data(0x00); hx8369_write_data(0x0C); hx8369_write_data(0xA0); hx8369_write_data(0x0E); hx8369_write_data(0x06); hx8369_write_cmd(0xB6); // SET VCOM hx8369_write_data(0x10); hx8369_write_data(0x10); hx8369_write_cmd(0xD5); // SET GIP hx8369_write_data(0x00); hx8369_write_data(0x05); hx8369_write_data(0x03); hx8369_write_data(0x00); hx8369_write_data(0x01); hx8369_write_data(0x09); hx8369_write_data(0x10); hx8369_write_data(0x80); hx8369_write_data(0x37); hx8369_write_data(0x37); hx8369_write_data(0x20); hx8369_write_data(0x31); hx8369_write_data(0x46); hx8369_write_data(0x8A); hx8369_write_data(0x57); hx8369_write_data(0x9B); hx8369_write_data(0x20); hx8369_write_data(0x31); hx8369_write_data(0x46); hx8369_write_data(0x8A); hx8369_write_data(0x57); hx8369_write_data(0x9B); hx8369_write_data(0x07); hx8369_write_data(0x0F); hx8369_write_data(0x02); hx8369_write_data(0x00); hx8369_write_cmd(0xE0); // SET Gamma hx8369_write_data(0x00); hx8369_write_data(0x08); hx8369_write_data(0x0D); hx8369_write_data(0x2D); hx8369_write_data(0x34); hx8369_write_data(0x3F); hx8369_write_data(0x19); hx8369_write_data(0x38); hx8369_write_data(0x09); hx8369_write_data(0x0E); hx8369_write_data(0x0E); hx8369_write_data(0x12); hx8369_write_data(0x14); hx8369_write_data(0x12); hx8369_write_data(0x14); hx8369_write_data(0x13); hx8369_write_data(0x19); hx8369_write_data(0x00); hx8369_write_data(0x08); hx8369_write_data(0x0D); hx8369_write_data(0x2D); hx8369_write_data(0x34); hx8369_write_data(0x3F); hx8369_write_data(0x19); hx8369_write_data(0x38); hx8369_write_data(0x09); hx8369_write_data(0x0E); hx8369_write_data(0x0E); hx8369_write_data(0x12); hx8369_write_data(0x14); hx8369_write_data(0x12); hx8369_write_data(0x14); hx8369_write_data(0x13); hx8369_write_data(0x19); hx8369_write_cmd(0xC1); hx8369_write_data(0x01); //enable DGC function hx8369_write_data(0x02); //SET R-GAMMA hx8369_write_data(0x08); hx8369_write_data(0x12); hx8369_write_data(0x1A); hx8369_write_data(0x22); hx8369_write_data(0x2A); hx8369_write_data(0x31); hx8369_write_data(0x36); hx8369_write_data(0x3F); hx8369_write_data(0x48); hx8369_write_data(0x51); hx8369_write_data(0x58); hx8369_write_data(0x60); hx8369_write_data(0x68); hx8369_write_data(0x70); hx8369_write_data(0x78); hx8369_write_data(0x80); hx8369_write_data(0x88); hx8369_write_data(0x90); hx8369_write_data(0x98); hx8369_write_data(0xA0); hx8369_write_data(0xA7); hx8369_write_data(0xAF); hx8369_write_data(0xB6); hx8369_write_data(0xBE); hx8369_write_data(0xC7); hx8369_write_data(0xCE); hx8369_write_data(0xD6); hx8369_write_data(0xDE); hx8369_write_data(0xE6); hx8369_write_data(0xEF); hx8369_write_data(0xF5); hx8369_write_data(0xFB); hx8369_write_data(0xFC); hx8369_write_data(0xFE); hx8369_write_data(0x8C); hx8369_write_data(0xA4); hx8369_write_data(0x19); hx8369_write_data(0xEC); hx8369_write_data(0x1B); hx8369_write_data(0x4C); hx8369_write_data(0x40); hx8369_write_data(0x02); //SET G-Gamma hx8369_write_data(0x08); hx8369_write_data(0x12); hx8369_write_data(0x1A); hx8369_write_data(0x22); hx8369_write_data(0x2A); hx8369_write_data(0x31); hx8369_write_data(0x36); hx8369_write_data(0x3F); hx8369_write_data(0x48); hx8369_write_data(0x51); hx8369_write_data(0x58); hx8369_write_data(0x60); hx8369_write_data(0x68); hx8369_write_data(0x70); hx8369_write_data(0x78); hx8369_write_data(0x80); hx8369_write_data(0x88); hx8369_write_data(0x90); hx8369_write_data(0x98); hx8369_write_data(0xA0); hx8369_write_data(0xA7); hx8369_write_data(0xAF); hx8369_write_data(0xB6); hx8369_write_data(0xBE); hx8369_write_data(0xC7); hx8369_write_data(0xCE); hx8369_write_data(0xD6); hx8369_write_data(0xDE); hx8369_write_data(0xE6); hx8369_write_data(0xEF); hx8369_write_data(0xF5); hx8369_write_data(0xFB); hx8369_write_data(0xFC); hx8369_write_data(0xFE); hx8369_write_data(0x8C); hx8369_write_data(0xA4); hx8369_write_data(0x19); hx8369_write_data(0xEC); hx8369_write_data(0x1B); hx8369_write_data(0x4C); hx8369_write_data(0x40); hx8369_write_data(0x02); //SET B-Gamma hx8369_write_data(0x08); hx8369_write_data(0x12); hx8369_write_data(0x1A); hx8369_write_data(0x22); hx8369_write_data(0x2A); hx8369_write_data(0x31); hx8369_write_data(0x36); hx8369_write_data(0x3F); hx8369_write_data(0x48); hx8369_write_data(0x51); hx8369_write_data(0x58); hx8369_write_data(0x60); hx8369_write_data(0x68); hx8369_write_data(0x70); hx8369_write_data(0x78); hx8369_write_data(0x80); hx8369_write_data(0x88); hx8369_write_data(0x90); hx8369_write_data(0x98); hx8369_write_data(0xA0); hx8369_write_data(0xA7); hx8369_write_data(0xAF); hx8369_write_data(0xB6); hx8369_write_data(0xBE); hx8369_write_data(0xC7); hx8369_write_data(0xCE); hx8369_write_data(0xD6); hx8369_write_data(0xDE); hx8369_write_data(0xE6); hx8369_write_data(0xEF); hx8369_write_data(0xF5); hx8369_write_data(0xFB); hx8369_write_data(0xFC); hx8369_write_data(0xFE); hx8369_write_data(0x8C); hx8369_write_data(0xA4); hx8369_write_data(0x19); hx8369_write_data(0xEC); hx8369_write_data(0x1B); hx8369_write_data(0x4C); hx8369_write_data(0x40); hx8369_write_cmd(0x3A); //24 bits //hx8369_write_data(0x77); //18 bits hx8369_write_data(0x66); hx8369_write_cmd(0x11); udelay(120000); hx8369_write_cmd(0x29); } static void lcd_reset() { int reg; reg = readl(GPF2CON);//reset reg &= ~(0xf << 16); reg |= (0x1<< 16); writel(reg,GPF2CON); reg = readl(GPF2DAT); reg |= (0x1 << 4); writel(reg,GPF2DAT); //udelay(100000); udelay(10000); reg = readl(GPF2DAT); reg &= ~(0x1 << 4); writel(reg,GPF2DAT); //udelay(200000); udelay(20000); reg = readl(GPF2DAT); reg |= (0x1 << 4); writel(reg,GPF2DAT); udelay(10000); //set_clk(1); //keep in stop state more than 6ms //set_outdata(1); //udelay(10000); } static void gpio_cfg() { int reg; reg = readl(GPF1CON); //cs reg &= ~(0xf << 20); reg |= (0x1<< 20); writel(reg,GPF1CON); reg = readl(GPF1CON); //clk reg &= ~(0xf << 16); reg |= (0x1<< 16); writel(reg,GPF1CON); reg = readl(GPF0CON); // outdata reg &= ~(0xf << 24); reg |= (0x1<< 24); writel(reg,GPF0CON); set_clk(1); //keep in stop state more than 6ms set_cs(1); set_outdata(1); udelay(10000); reg = readl(GPF0CON); //set 3.3v reg &= ~(0xf << 16); reg |= (0x1<< 16); writel(reg,GPF0CON); reg = readl(GPF0DAT); reg &= ~(0x1 << 4); writel(reg, GPF0DAT); } /*lcd config*/ void lcd_config() { gpio_cfg(); lcd_reset(); set_hx8369(); set_cs(1); set_clk(1); set_outdata(1); } #endif
//gzsd #ifdef CONFIG_FB_S3C_TFT480 static struct s3cfb_lcd hx8369 = { .width = 480,//480, .height = 800,//800, //.p_width = 52, //.p_height = 86, .bpp = 24, .freq = 60, .timing = { #if 1 .h_fp = 32, .h_bp = 32, .h_sw = 14, .v_fp = 12, .v_fpe = 1, .v_bp = 12, .v_bpe = 1, .v_sw = 8, #else .h_fp = 15, .h_bp = 4, .h_sw = 14, .v_fp = 3, .v_fpe = 1, .v_bp = 3, .v_bpe = 1, .v_sw = 2, #endif }, .polarity = { .rise_vclk = 0, // video data fetch at DOTCLK falling edge .inv_hsync = 1, // low active .inv_vsync = 1, // low active .inv_vden = 0, // data is vaild when DEpin is high }, }; static void hx8369_cfg_gpio(struct platform_device *pdev) { int i; for (i = 0; i < 5; i++) { s3c_gpio_cfgpin(S5PV210_GPF0(i), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV210_GPF0(i), S3C_GPIO_PULL_NONE); } s3c_gpio_cfgpin(S5PV210_GPF0(7), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV210_GPF0(7), S3C_GPIO_PULL_NONE); for (i = 0; i < 4; i++) { s3c_gpio_cfgpin(S5PV210_GPF1(i), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV210_GPF1(i), S3C_GPIO_PULL_NONE); } s3c_gpio_cfgpin(S5PV210_GPF1(6), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV210_GPF1(6), S3C_GPIO_PULL_NONE); s3c_gpio_cfgpin(S5PV210_GPF1(7), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV210_GPF1(7), S3C_GPIO_PULL_NONE); for (i = 0; i < 4; i++) { s3c_gpio_cfgpin(S5PV210_GPF2(i), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV210_GPF2(i), S3C_GPIO_PULL_NONE); } for (i = 5; i < 8; i++) { s3c_gpio_cfgpin(S5PV210_GPF2(i), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV210_GPF2(i), S3C_GPIO_PULL_NONE); } for (i = 0; i < 4; i++) { s3c_gpio_cfgpin(S5PV210_GPF3(i), S3C_GPIO_SFN(2)); s3c_gpio_setpull(S5PV210_GPF3(i), S3C_GPIO_PULL_NONE); } /* mDNIe SEL: why we shall write 0x2 ? */ writel(0x2, S5P_MDNIE_SEL); /* drive strength to max */ writel(0xffffffff, S5PV210_GPF0_BASE + 0xc); writel(0xffffffff, S5PV210_GPF1_BASE + 0xc); writel(0xffffffff, S5PV210_GPF2_BASE + 0xc); writel(0x000000ff, S5PV210_GPF3_BASE + 0xc); } static int hx8369_backlight_on(struct platform_device *pdev) { int err; err = gpio_request(S5PV210_GPD0(0), "GPD0"); if (err) { printk(KERN_ERR "failed to request GPD0 for " "lcd backlight control\n"); return err; } gpio_direction_output(S5PV210_GPD0(0), 1); //s3c_gpio_cfgpin(S5PV210_GPD0(0), S5PV210_GPD_0_0_TOUT_0); gpio_free(S5PV210_GPD0(0)); return 0; } static int hx8369_backlight_off(struct platform_device *pdev, int onoff) { int err; err = gpio_request(S5PV210_GPD0(0), "GPD0"); if (err) { printk(KERN_ERR "failed to request GPD0 for " "lcd backlight control\n"); return err; } gpio_direction_output(S5PV210_GPD0(0), 0); gpio_free(S5PV210_GPD0(0)); return 0; } static int hx8369_reset_lcd(struct platform_device *pdev) { /* int err; err = gpio_request(S5PV210_GPH2(4), "GPH2"); if (err) { printk(KERN_ERR "failed to request GPH2 for " "lcd reset control\n"); return err; } gpio_direction_output(S5PV210_GPF2(4), 1); mdelay(100); gpio_set_value(S5PV210_GPF2(4), 0); mdelay(10); gpio_set_value(S5PV210_GPF2(4), 1); mdelay(10); gpio_free(S5PV210_GPF2(4)); return 0; */ } static struct s3c_platform_fb hx8369_fb_data __initdata = { .hw_ver = 0x62, .nr_wins = 5, .default_win = CONFIG_FB_S3C_DEFAULT_WINDOW, .swap = FB_SWAP_WORD | FB_SWAP_HWORD, .lcd = &hx8369, .cfg_gpio = hx8369_cfg_gpio, .backlight_on = hx8369_backlight_on, .backlight_onoff = hx8369_backlight_off, .reset_lcd = hx8369_reset_lcd, }; #endif