PlanAhead中工程不能生成编程文件之分析

ERROR:Bitgen:342 - This design contains pins which have locations (LOC) that are
   not user-assigned or I/O Standards (IOSTANDARD) that are not user-assigned. 
   This may cause I/O contention or incompatibility with the board power or
   connectivity affecting performance, signal integrity or in extreme cases
   cause damage to the device or the components to which it is connected.  To
   prevent this error, it is highly suggested to specify all pin locations and
   I/O standards to avoid potential contention or conflicts and allow proper
   bitstream creation.  To demote this error to a warning and allow bitstream
   creation with unspecified I/O location or standards, you may apply the

   following bitgen switch: -g UnconstrainedPins:Allow

我的管脚分配完全是按照ug873分配的：

NET axi_gpio_0_GPIO_IO_pin IOSTANDARD=LVCMOS25 | LOC=G19;

NET processing_system7_0_GPIO_pin IOSTANDARD=LVCMOS25 | LOC=F19;

那会什么原因呢？

问题是：电平不匹配或者使用了用户不能使用的管脚。

都是文档太挫惹得祸。。。。

NET axi_gpio_0_GPIO_IO_pin IOSTANDARD=LVCMOS18 | LOC=G19;

NET processing_system7_0_GPIO_pin IOSTANDARD=LVCMOS18 | LOC=F19;