S3C6410 ADS1.2 下裸奔 1

最近这些天开始研究S3C6410处理器,最好的方法就是在前后台上面验证各个功能,经过这几天的查阅,总结调试方法如下,

一、开发环境

1.  硬件:real6410开发板,淘宝上70块的盗版jlink

2.  软件:ADS1.2

 

二、步骤

1. 网上下载了一个mini6410的led实例代码,这其中包含cpu的初始化,这样我使用它先对cpu做下初始化工作

   方法: 1.  用ADS打来mini6410_led的工程,设置代码段地址为内部SRAM起始地址0x0C000000,编译生成mini6410_led.bin

              2. 设置6410的DBG_SEL管脚为低电平,这样J-Link Commander能够检测到ARM11核,jlink版本为4.08

              3. 设置6410的启动方式为NOR Flash启动

              4. 打开J-Link Commander,使用loadbin *.bin 0x0C000000 将二进制代码下载到0x0C000000处,运行setpc 0x0C000000 命令,将PC指针设置为0x0C000000,运行g命令,程序开始运行,串口打印出"Hello Mini6410",运行r,和h命令挂起CPU

               5. 将mini6410_led的工程,设置代码段地址为0,数据段地址设为内部SRAM起始地址0x0C000000,编译生成mini6410_led.bin

                6. 打开J-Flash ARM,运行“target”->"connect",使用默认配置即可检测到ARM核和Flash,然后将步骤5的.bin文件烧写到NOR Flash中,重启6410的板子,即可在SRAM中调试程序。

2. 按照Eboot的初始化代码,尝试初始化6410,使用如下代码烧写到NOR Flash也可以在内部SRAM中调试,接下来会再处理DDR的初始化。

;// startup.s

WTCON             EQU    (0x7E004000)
VIC0INTENCLEAR    EQU    (0x71200014)
VIC1INTENCLEAR    EQU    (0x71300014)
PERIPHERALBASE    EQU    (0x70000000)
APLL_LOCK         EQU    (0x7e00f000)
MPLL_LOCK         EQU    (0x7e00f004)
APLL_CON          EQU    (0x7e00f00c)
MPLL_CON          EQU    (0x7e00f010)
EPLL_CON0         EQU    (0x7e00f014)
EPLL_CON1         EQU    (0x7e00f018)
CLK_SRC           EQU    (0x7e00f01c)
CLK_DIV0          EQU    (0x7e00f020)
CLK_OUT           EQU    (0x7e00f02c)
MEM_SYS_CFG       EQU    (0x7e00f120)
OTHERS            EQU    (0x7e00f900)
RST_STAT          EQU    (0x7E00F904)
INFORM0           EQU    (0x7E00FA00)
INFORM1           EQU    (0x7E00FA04)
INFORM2           EQU    (0x7E00FA08)
INFORM3           EQU    (0x7E00FA0C)

 

FIN          EQU    12000000
;Fvco=1064MHz, Fout=532MHz
APLL_MVAL    EQU    (266)
APLL_PVAL    EQU    (3)
APLL_SVAL    EQU    (1)

;Fvco=1064MHz, Fout=266MHz
MPLL_MVAL    EQU    (266)
MPLL_PVAL    EQU    (3)
MPLL_SVAL    EQU    (2)

;Fout=84 MHz
EPLL_MVAL    EQU    (28)
EPLL_PVAL    EQU    (1)
EPLL_SVAL    EQU    (2)
EPLL_KVAL    EQU    (0)

PCLK_DIV    EQU    (4-1)    ; PCLK      = HCLKx2/4    = 66.5    
HCLKx2_DIV  EQU    (2-1)    ; HCLKx2    = APLL_CLK/2  = 266
HCLK_DIV    EQU    (2-1)    ; AHB_CLK   = HCLKx2/2    = 133
MPLL_DIV    EQU    (2-1)    ; DOUT_MPLL = MPLL_Fout/2 =
APLL_DIV    EQU    (1-1)    ; ARM_CLK   = APLL_CLK    = 532

 PRESERVE8
 AREA Init, CODE, READONLY
 
 IMPORT  Main
StartUp


        b        ResetHandler
        b        .                ; HandlerUndef    (0x00000004)
        b        .                ; HandlerSWI        (0x00000008)
        b        .                ; HandlerPabort    (0x0000000C)
        b        .                ; HandlerDabort    (0x00000010)
        b        .                ; HandlerReserved    (0x00000014)
        b        .                ; HandlerIRQ        (0x00000018)
        b        .                ; HandlerFIQ        (0x0000001C)

ResetHandler
        ; Disable MMU
     MRC     p15,0,R0,c1,c0,0  
  BIC      R0,R0,#1
  MRC     p15,0,R0,c1,c0,0

        ; Disable I&D Cache
        MRC        p15, 0, r0, c1, c0, 0
        BIC        r0, r0, #1<<2
        BIC        r0, r0, #1<<12
        MCR        p15, 0, r0, c1, c0, 0
       
        ldr        r0, =0x70000013        ; Base Addres : 0x70000000, Size : 256 MB (0x13)
                                          ; 必须初始化,否则写外设寄存器失败???
        mcr        p15,0,r0,c15,c2,4
       
        ; Disable WDT
        ldr        r0, =WTCON
        ldr        r1, =0x0
        str        r1, [r0]
       
        ; Disable Interrupt
        ldr        r0, =VIC0INTENCLEAR
        ldr        r1, =0xFFFFFFFF;
        str        r1, [r0]

        ldr        r0, =VIC1INTENCLEAR
        ldr        r1, =0xFFFFFFFF;
        str        r1, [r0]
       
        ; Set Clk Mode,Sync
        ldr        r0, =OTHERS
        ldr        r1, [r0]
        orr        r1, r1, #0x40            ; SyncMUXSEL = DOUT_APLL
        str        r1, [r0]

        nop
        nop
        nop
        nop
        nop

        ldr        r1, [r0]
        orr        r1, r1, #0x80          ; SyncReq = request Sync
        str        r1, [r0]

WaitForSync
        ldr        r1, [r0]               ; Read OTHERS
        and        r1, r1, #0xF00         ; Wait SYNCMODEACK = 0xF
        cmp        r1, #0xF00
        bne        WaitForSync
       
ChangePll
        ldr     r0, =CLK_SRC
        ldr     r1, [r0]
        bic     r1, r1, #0x7              ; select FIN out,Disable PLL Clock Out
        str     r1, [r0]


        ldr        r0, =CLK_DIV0
        ldr        r1, [r0]
        bic        r1, r1, #0xff00
        bic        r1, r1, #0xff
        ldr        r2, = ((PCLK_DIV<<12)+(HCLKx2_DIV<<9)+(HCLK_DIV<<8)+(MPLL_DIV<<4)+(APLL_DIV<<0))
        orr        r1, r1, r2
        str        r1, [r0]
       
       
        ldr        r1, =0xffff            ; Lock Time : 0x4b1 (100us @Fin12MHz) for APLL/MPLL
        ldr        r2, =0xE13             ; Lock Time : 0xe13 (300us @Fin12MHz) for EPLL

        ldr        r0, =APLL_LOCK
        str        r1, [r0]               ; APLL Lock Time
        str        r1, [r0, #0x4]         ; MPLL Lock Time
        str        r2, [r0, #0x8]         ; EPLL Lock Time
       
       
        ldr        r0, =APLL_CON
        ldr        r1, =((1<<31)+(APLL_MVAL<<16)+(APLL_PVAL<<8)+(APLL_SVAL))
        str        r1, [r0]

        ldr        r0, =MPLL_CON
        ldr        r1, =((1<<31)+(MPLL_MVAL<<16)+(MPLL_PVAL<<8)+(MPLL_SVAL))
        str        r1, [r0]

        ldr        r0, =EPLL_CON1
        ldr        r1, =EPLL_KVAL
        str        r1, [r0]

        ldr        r0, =EPLL_CON0
        ldr        r1, =((1<<31)+(EPLL_MVAL<<16)+(EPLL_PVAL<<8)+(EPLL_SVAL))
        str        r1, [r0]


        ldr        r0, =CLK_SRC
        ldr        r1, [r0]
        orr        r1, r1, #0x7            ; PLL  Clockout
        str        r1, [r0]                ; System will be waiting for PLL unlocked after this instruction

;//config memroy       
        ldr        r0, =MEM_SYS_CFG
        ldr        r1, [r0]
        orr        r1, r1,#0x1000          ; set norflash bus_width = 16
        bic        r1, r1,#0xbf         ; DDR Port1:32bit,cs0、1、4、5:sromc,cs2、3:nfcon
        str        r1, [r0]

 

      B        Main

 

         END

 

//main.c

#define rGPMCON         (*(volatile unsigned *)(0x7F008820))
#define rGPMDAT         (*(volatile unsigned *)(0x7F008824))
#define rGPMPUD         (*(volatile unsigned *)(0x7F008828))

int Main(void)
{
    int i;
 rGPMCON = (1<<0)|(1<<4)|(1<<8)|(1<<12);
 while(1)
 {
  rGPMDAT = 0x0F;
  for(i=0 ; i < 500000 ; i++);
  rGPMDAT = 0x00;
  for(i=0 ; i < 500000 ; i++); 
 }
}

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