Instruction-level parallelism(ILP) : http://en.wikipedia.org/wiki/Instruction_level_parallelism
Vector processor : http://en.wikipedia.org/wiki/Vector_processor
MMX : http://en.wikipedia.org/wiki/MMX_(instruction_set)
superscalar : http://en.wikipedia.org/wiki/Superscalar
Out-of-order execution : http://en.wikipedia.org/wiki/Out-of-order_execution
Very long instruction word:http://en.wikipedia.org/wiki/VLIW
Register renaming:http://en.wikipedia.org/wiki/Register_renaming
Register file:http://en.wikipedia.org/wiki/Register_file
Loop tiling:http://en.wikipedia.org/wiki/Loop_tiling
Loop optimization :http://en.wikipedia.org/wiki/Loop_fusion
Register allocation :http://en.wikipedia.org/wiki/Register_allocation
Calling convention:http://en.wikipedia.org/wiki/Calling_convention
Static single assignment form:http://en.wikipedia.org/wiki/Static_single_assignment_form
Graph coloring:http://en.wikipedia.org/wiki/Graph_coloring#Vertex_coloring
Alias analysis:http://en.wikipedia.org/wiki/Alias_analysis
Load/store architecture:http://en.wikipedia.org/wiki/Load/store_architecture