static void GPIOFinishBUZZER(BOOL Input)

 

static void GPIOFinishBUZZER(BOOL Input)
{
    PCSP_IOMUX_REGS pIOMUX;
    PCSP_GPIO_REGS pGPIO1;

    PHYSICAL_ADDRESS phyAddr;
 
    phyAddr.QuadPart = CSP_BASE_REG_PA_IOMUXC;

     // Map peripheral physical address to virtual address
     pIOMUX = (PCSP_IOMUX_REGS) MmMapIoSpace(phyAddr,
           sizeof(CSP_IOMUX_REGS), FALSE); 

    phyAddr.QuadPart = CSP_BASE_REG_PA_GPIO1;

     pGPIO1 = (PCSP_GPIO_REGS) MmMapIoSpace(phyAddr,
           sizeof(PCSP_GPIO_REGS), FALSE); 

//PWMO
// ----------------------------------------------------
//     DDK_IOMUX_PIN_PWMO      MCU1_9      active high (PWMO...BUZZER_OUT)
    OAL_IOMUX_SET_MUX(pIOMUX, DDK_IOMUX_PIN_PWMO, DDK_IOMUX_OUT_GPIO, DDK_IOMUX_IN_GPIO);

    if (Input)
    {
 OUTREG32(&pGPIO1->GDIR, (INREG32(&pGPIO1->GDIR) | (1 << 9)));
 OUTREG32(&pGPIO1->DR, (INREG32(&pGPIO1->DR) | (1 << 9)));
    }
    else
    {
 OUTREG32(&pGPIO1->GDIR, (INREG32(&pGPIO1->GDIR) | (1 << 9)));
 OUTREG32(&pGPIO1->DR, (INREG32(&pGPIO1->DR) & ~(1 << 9))); 

 

      if (pIOMUX != NULL)
      {
        MmUnmapIoSpace(pIOMUX, sizeof(PCSP_IOMUX_REGS));
        pIOMUX = NULL;
       } 

      if (pGPIO1 != NULL)
      {
        MmUnmapIoSpace(pGPIO1, sizeof(PCSP_GPIO_REGS));
        pGPIO1 = NULL;
       } 

  
    }
 
}

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