HDMI信号横彩条,竖彩条,棋盘格的方法

//*************************************************************************\

//==========================================================================

//   Description:

//  彩条发生模块

 

module color_bar(

input clk,            //像素时钟输入,1280x720@60P的像素时钟为74.25

input rst,            //复位,高有效

output hs,            //行同步、高有效

output vs,            //场同步、高有效

output de,            //数据有效

output[7:0] rgb_r,    //像素数据、红色分量

output[7:0] rgb_g,    //像素数据、绿色分量

output[7:0] rgb_b     //像素数据、蓝色分量

);

/*********视频时序参数定义******************************************/

parameter H_ACTIVE = 16'd1280;  //行有效长度(像素时钟周期个数)

parameter H_FP = 16'd110;       //行同步前肩长度

parameter H_SYNC = 16'd40;      //行同步长度

parameter H_BP = 16'd220;       //行同步后肩长度

parameter V_ACTIVE = 16'd720;   //场有效长度(行的个数)

parameter V_FP = 16'd5;        //场同步前肩长度

parameter V_SYNC  = 16'd5;      //场同步长度

parameter V_BP = 16'd20;       //场同步后肩长度

parameter H_TOTAL = H_ACTIVE + H_FP + H_SYNC + H_BP;//行总长度

parameter V_TOTAL = V_ACTIVE + V_FP + V_SYNC + V_BP;//场总长度

/*********彩条RGB color bar颜色参数定义*****************************/

parameter WHITE_R = 8'hff;

parameter WHITE_G = 8'hff;

parameter WHITE_B = 8'hff;

parameter YELLOW_R = 8'hff;

parameter YELLOW_G = 8'hff;

parameter YELLOW_B = 8'h00;                              

parameter CYAN_R = 8'h00;

parameter CYAN_G = 8'hff;

parameter CYAN_B = 8'hff;                             

parameter GREEN_R = 8'h00;

parameter GREEN_G = 8'hff;

parameter GREEN_B = 8'h00;

parameter MAGENTA_R = 8'hff;

parameter MAGENTA_G = 8'h00;

parameter MAGENTA_B = 8'hff;

parameter RED_R = 8'hff;

parameter RED_G = 8'h00;

parameter RED_B = 8'h00;

parameter BLUE_R = 8'h00;

parameter BLUE_G = 8'h00;

parameter BLUE_B = 8'hff;

parameter BLACK_R = 8'h00;

parameter BLACK_G = 8'h00;

parameter BLACK_B = 8'h00;

reg hs_reg;//定义一个寄存器,用于行同步

reg vs_reg;//定义一个寄存器,用户场同步

reg hs_reg_d0;//hs_reg一个时钟的延迟

              //所有以_d0、d1、d2等为后缀的均为某个寄存器的延迟

reg vs_reg_d0;//vs_reg一个时钟的延迟

reg[11:0] h_cnt;//用于行的计数器

reg[11:0] v_cnt;//用于场(帧)的计数器

reg[11:0] active_x;//有效图像的的坐标x

reg[11:0] active_y;//有效图像的坐标y

reg[7:0] rgb_r_reg;//像素数据r分量

reg[7:0] rgb_g_reg;//像素数据g分量

reg[7:0] rgb_b_reg;//像素数据b分量

reg h_active;//行图像有效

reg v_active;//场图像有效

wire video_active;//一帧内图像的有效区域h_active & v_active

reg video_active_d0;

 

assign hs = hs_reg_d0;

assign vs = vs_reg_d0;

assign video_active = h_active & v_active;

assign de = video_active_d0;

assign rgb_r = rgb_r_reg;

assign rgb_g = rgb_g_reg;

assign rgb_b = rgb_b_reg;

always@(posedge clk or posedge rst)

begin

if(rst)

begin

hs_reg_d0 <= 1'b0;

vs_reg_d0 <= 1'b0;

video_active_d0 <= 1'b0;

end

else

begin

hs_reg_d0 <= hs_reg;

vs_reg_d0 <= vs_reg;

video_active_d0 <= video_active;

end

end

 

always@(posedge clk or posedge rst)

begin

if(rst)

h_cnt <= 12'd0;

else if(h_cnt == H_TOTAL - 1)//行计数器到最大值清零

h_cnt <= 12'd0;

else

h_cnt <= h_cnt + 12'd1;

end

 

always@(posedge clk or posedge rst)

begin

if(rst)

active_x <= 12'd0;

else if(h_cnt >= H_FP + H_SYNC + H_BP - 1)//计算图像的x坐标

active_x <= h_cnt - (H_FP[11:0] + H_SYNC[11:0] + H_BP[11:0] - 12'd1);

else

active_x <= active_x;

end

 

always@(posedge clk or posedge rst)

begin

if(rst)

active_y <= 12'd0;

else if(v_cnt >= V_FP + V_SYNC + V_BP - 1)//计算图像的x坐标

active_y <= v_cnt - (V_FP[11:0] + V_SYNC[11:0] + V_BP[11:0] - 12'd1);

else

active_y <= active_y;

end

 

always@(posedge clk or posedge rst)

begin

if(rst)

v_cnt <= 12'd0;

else if(h_cnt == H_FP  - 1)//在行数计算器为H_FP - 1的时候场计数器+1或清零

if(v_cnt == V_TOTAL - 1)//场计数器到最大值了,清零

v_cnt <= 12'd0;

else

v_cnt <= v_cnt + 12'd1;//没到最大值,+1

else

v_cnt <= v_cnt;

end

 

always@(posedge clk or posedge rst)

begin

if(rst)

hs_reg <= 1'b0;

else if(h_cnt == H_FP - 1)//行同步开始了...

hs_reg <= 1'b1;

else if(h_cnt == H_FP + H_SYNC - 1)//行同步这时候要结束了

hs_reg <= 1'b0;

else

hs_reg <= hs_reg;

end

 

always@(posedge clk or posedge rst)

begin

if(rst)

h_active <= 1'b0;

else if(h_cnt == H_FP + H_SYNC + H_BP - 1)

h_active <= 1'b1;

else if(h_cnt == H_TOTAL - 1)

h_active <= 1'b0;

else

h_active <= h_active;

end

 

always@(posedge clk or posedge rst)

begin

if(rst)

vs_reg <= 1'd0;

else if((v_cnt == V_FP - 1) && (h_cnt == H_FP - 1))

vs_reg <= 1'b1;

else if((v_cnt == V_FP + V_SYNC - 1) && (h_cnt == H_FP - 1))

vs_reg <= 1'b0;

else

vs_reg <= vs_reg;

end

 

always@(posedge clk or posedge rst)

begin

if(rst)

v_active <= 1'd0;

else if((v_cnt == V_FP + V_SYNC + V_BP - 1) && (h_cnt == H_FP - 1))

v_active <= 1'b1;

else if((v_cnt == V_TOTAL - 1) && (h_cnt == H_FP - 1))

v_active <= 1'b0;

else

v_active <= v_active;

end

 

 

//`define X_AXIS_BAR

//`define Y_AXIS_BAR

`define CHESS_BAR

 

 

`ifdef X_AXIS_BAR

// 浠ヤ笅浜х敓姘村钩娴嬭瘯鏉★紝浣滀负涓€涓涔犲垵濮嬩簡瑙g殑鍐呭锛

always@(posedge clk or posedge rst)

begin

if(rst)

begin

rgb_r_reg <= 8'h00;

rgb_g_reg <= 8'h00;

rgb_b_reg <= 8'h00;

end

else if(video_active)

if(active_x == 12'd0)

begin

rgb_r_reg <= WHITE_R;

rgb_g_reg <= WHITE_G;

rgb_b_reg <= WHITE_B;

end

else if(active_x == (H_ACTIVE/8) * 1)

begin

rgb_r_reg <= YELLOW_R;

rgb_g_reg <= YELLOW_G;

rgb_b_reg <= YELLOW_B;

end

else if(active_x == (H_ACTIVE/8) * 2)

begin

rgb_r_reg <= CYAN_R;

rgb_g_reg <= CYAN_G;

rgb_b_reg <= CYAN_B;

end

else if(active_x == (H_ACTIVE/8) * 3)

begin

rgb_r_reg <= GREEN_R;

rgb_g_reg <= GREEN_G;

rgb_b_reg <= GREEN_B;

end

else if(active_x == (H_ACTIVE/8) * 4)

begin

rgb_r_reg <= MAGENTA_R;

rgb_g_reg <= MAGENTA_G;

rgb_b_reg <= MAGENTA_B;

end

else if(active_x == (H_ACTIVE/8) * 5)

begin

rgb_r_reg <= RED_R;

rgb_g_reg <= RED_G;

rgb_b_reg <= RED_B;

end

else if(active_x == (H_ACTIVE/8) * 6)

begin

rgb_r_reg <= BLUE_R;

rgb_g_reg <= BLUE_G;

rgb_b_reg <= BLUE_B;

end

else if(active_x == (H_ACTIVE/8) * 7)

begin

rgb_r_reg <= BLACK_R;

rgb_g_reg <= BLACK_G;

rgb_b_reg <= BLACK_B;

end

else

begin

rgb_r_reg <= rgb_r_reg;

rgb_g_reg <= rgb_g_reg;

rgb_b_reg <= rgb_b_reg;

end

else

begin

rgb_r_reg <= 8'h00;

rgb_g_reg <= 8'h00;

rgb_b_reg <= 8'h00;

end

end

 

`endif

 

 

 

`ifdef Y_AXIS_BAR

// 浠ヤ笅浜х敓姘村钩娴嬭瘯鏉★紝浣滀负涓€涓涔犲垵濮嬩簡瑙g殑鍐呭锛

always@(posedge clk or posedge rst)

begin

if(rst)

begin

rgb_r_reg <= 8'h00;

rgb_g_reg <= 8'h00;

rgb_b_reg <= 8'h00;

end

else if(video_active)

if(active_y >= 12'd0 && active_y < (V_ACTIVE/8))

begin

rgb_r_reg <= WHITE_R;

rgb_g_reg <= WHITE_G;

rgb_b_reg <= WHITE_B;

end

else if(active_y >= (V_ACTIVE/8) * 1 && active_y < (V_ACTIVE/8) * 2)

begin

rgb_r_reg <= YELLOW_R;

rgb_g_reg <= YELLOW_G;

rgb_b_reg <= YELLOW_B;

end

else if(active_y >= (V_ACTIVE/8) * 2 && active_y < (V_ACTIVE/8) * 3)

begin

rgb_r_reg <= CYAN_R;

rgb_g_reg <= CYAN_G;

rgb_b_reg <= CYAN_B;

end

else if(active_y >= (V_ACTIVE/8) * 3 && active_y < (V_ACTIVE/8) * 4)

begin

rgb_r_reg <= GREEN_R;

rgb_g_reg <= GREEN_G;

rgb_b_reg <= GREEN_B;

end

else if(active_y >= (V_ACTIVE/8) * 4 && active_y < (V_ACTIVE/8) * 5)

begin

rgb_r_reg <= MAGENTA_R;

rgb_g_reg <= MAGENTA_G;

rgb_b_reg <= MAGENTA_B;

end

else if(active_y >= (V_ACTIVE/8) * 5 && active_y < (V_ACTIVE/8) * 6)

begin

rgb_r_reg <= RED_R;

rgb_g_reg <= RED_G;

rgb_b_reg <= RED_B;

end

else if(active_y >= (V_ACTIVE/8) * 6 && active_y < (V_ACTIVE/8) * 7)

begin

rgb_r_reg <= BLUE_R;

rgb_g_reg <= BLUE_G;

rgb_b_reg <= BLUE_B;

end

else if(active_y >= (V_ACTIVE/8) * 7 && active_y < (V_ACTIVE/8) * 8)

begin

rgb_r_reg <= BLACK_R;

rgb_g_reg <= BLACK_G;

rgb_b_reg <= BLACK_B;

end

else

begin

rgb_r_reg <= rgb_r_reg;

rgb_g_reg <= rgb_g_reg;

rgb_b_reg <= rgb_b_reg;

end

else

begin

rgb_r_reg <= 8'h00;

rgb_g_reg <= 8'h00;

rgb_b_reg <= 8'h00;

end

end

 

`endif

 

 

`ifdef CHESS_BAR

wire [3 : 0]chess_xy;

assign  chess_xy = active_x / (H_ACTIVE/8)  + active_y / (H_ACTIVE/8);

 

// 浠ヤ笅浜х敓姘村钩娴嬭瘯鏉★紝浣滀负涓€涓涔犲垵濮嬩簡瑙g殑鍐呭锛

always@(posedge clk or posedge rst)

begin

if(rst)

begin

rgb_r_reg <= 8'h00;

rgb_g_reg <= 8'h00;

rgb_b_reg <= 8'h00;

end

else if(video_active)

if(chess_xy[0] == 1'b0)

begin

rgb_r_reg <= WHITE_R;

rgb_g_reg <= WHITE_G;

rgb_b_reg <= WHITE_B;

end

else if(chess_xy[0] == 1'b1)

begin

rgb_r_reg <= BLACK_R;

rgb_g_reg <= BLACK_G;

rgb_b_reg <= BLACK_B;

end

else

begin

rgb_r_reg <= 8'h00;

rgb_g_reg <= 8'h00;

rgb_b_reg <= 8'h00;

end

end

 

`endif

 

 

endmodule

 

注意三种不同的格式,是通过`define来定义,通过条件编译来选下。

同时, 注意CHESS的黑白图的写法,比较简洁。通过产生一个8X8的块,然后做加法来做条件判断。

 

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