zynq的Microblaze软核运行
helloworld.c内容:
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*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
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* (a) running on a Xilinx device, or
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/*
* helloworld.c: simple test application
*
* This application configures UART 16550 to baud rate 9600.
* PS7 UART (Zynq) is not initialized by this application, since
* bootrom/bsp configures it to baud rate 115200
*
* ------------------------------------------------
* | UART TYPE BAUD RATE |
* ------------------------------------------------
* uartns550 9600
* uartlite Configurable only in HW design
* ps7_uart 115200 (configured by bootrom/bsp)
*/
/*
在app_mb0的lscript.ld里加了以下:
.local_memory : {
__local_memory_start = .;
*(.local_memory)
__local_memory_end = .;
} > microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem
*/
/*
在app_mb0的工程设置中设置:
编译选项: -ffunction-sections -fdata-sections
连接选项: --gc-sections -Os --no-relax
*/
/*注意bootimage.bif的内容:
the_ROM_image:
{
[bootloader] fsbl.elf
download.bit
app_cpu0.elf
[load = 0x30000000] app_mb0_o.elf
}*/
/*在编译生成app_cpu0.elf、 app_mb0.elf、 fsbl.elf后把所有需要的文件拷贝到同一目录下并在DOS命令行下运行：
1,>arm-xilinx-eabi-objcopy -I elf32-little -O elf32-little -R .local_memory -R .vectors.* app_mb0.elf app_mb0_o.elf
2,>data2mem -bm system_bd.bmm -bt system.bit -bd app_mb0.elf tag system_i_microblaze_0 -o b download.bit
3,>bootgen -image bootimage.bif -o i BOOT.BIN -w on
*/
/*
在运行>arm-xilinx-eabi-objcopy -I elf32-little -O elf32-little -R .local_memory -R .vectors.* app_mb0.elf app_mb0_o.elf
时出现以下提示，不必关心:
BFD: app_mb0.elf: warning: Empty loadable segment detected, is this intentional
?
BFD: app_mb0.elf: warning: Empty loadable segment detected, is this intentional
?
*/
/*
.text : {
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
KEEP (*(.vectors.*))
} > microblaze_0_i_bram_ctrl_microblaze_0_d_bram_ctrl
*/
#include
#include "platform.h"
#include "xil_printf.h"
#include "xparameters.h"
#include "xgpio.h"
#include "sleep.h"
#define XIL_INTERNAL_RAM __attribute__((section(".local_memory")))
void led(void) XIL_INTERNAL_RAM; //将它装载到local BRAM
int main()
{
print("MB0:Hello World\n\r");
led();
cleanup_platform();
return 0;
}
void led(void)
{
XGpio gpio_led;
int status;
status = XGpio_Initialize(&gpio_led, XPAR_GPIO_0_DEVICE_ID);
if(status != XST_SUCCESS){
xil_printf("MB0:axi-gpio initialize failed! \r\n");
return XST_FAILURE;
}
XGpio_SetDataDirection(&gpio_led,1,0);//设置通道1为输出
while(1) {
XGpio_DiscreteWrite(&gpio_led, 1,1);
usleep(200000); //延时
XGpio_DiscreteWrite(&gpio_led, 1,0);
usleep(200000); //延时
}
}
+++++++++++++++++++++++++++++
lscript.ld内容:
/*******************************************************************/
/* */
/* This file is automatically generated by linker script generator.*/
/* */
/* Version: */
/* */
/* Copyright (c) 2010-2016 Xilinx, Inc. All rights reserved. */
/* */
/* Description : MicroBlaze Linker Script */
/* */
/*******************************************************************/
_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400;
_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x800;
/* Define Memories in the system */
MEMORY
{
microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem : ORIGIN = 0x50, LENGTH = 0xFFB0
ps7_ddr_0_HP0_AXI_BASENAME : ORIGIN = 0x30000000, LENGTH = 0x10000000
ps7_ram_1_HP0_AXI_BASENAME : ORIGIN = 0xFFFC0000, LENGTH = 0x40000
}
/* Specify the default entry point to the program */
ENTRY(_start)
/* Define the sections, and where they are mapped in memory */
SECTIONS
{
.vectors.reset 0x0 : {
KEEP (*(.vectors.reset))
}
.vectors.sw_exception 0x8 : {
KEEP (*(.vectors.sw_exception))
}
.vectors.interrupt 0x10 : {
KEEP (*(.vectors.interrupt))
}
.vectors.hw_exception 0x20 : {
KEEP (*(.vectors.hw_exception))
}
.text : {
*(.text)
*(.text.*)
*(.gnu.linkonce.t.*)
} > ps7_ddr_0_HP0_AXI_BASENAME
.init : {
KEEP (*(.init))
} > ps7_ddr_0_HP0_AXI_BASENAME
.fini : {
KEEP (*(.fini))
} > ps7_ddr_0_HP0_AXI_BASENAME
.ctors : {
__CTOR_LIST__ = .;
___CTORS_LIST___ = .;
KEEP (*crtbegin.o(.ctors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__CTOR_END__ = .;
___CTORS_END___ = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.dtors : {
__DTOR_LIST__ = .;
___DTORS_LIST___ = .;
KEEP (*crtbegin.o(.dtors))
KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
PROVIDE(__DTOR_END__ = .);
PROVIDE(___DTORS_END___ = .);
} > ps7_ddr_0_HP0_AXI_BASENAME
.rodata : {
__rodata_start = .;
*(.rodata)
*(.rodata.*)
*(.gnu.linkonce.r.*)
__rodata_end = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.sdata2 : {
. = ALIGN(8);
__sdata2_start = .;
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
. = ALIGN(8);
__sdata2_end = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.sbss2 : {
__sbss2_start = .;
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
__sbss2_end = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.data : {
. = ALIGN(4);
__data_start = .;
*(.data)
*(.data.*)
*(.gnu.linkonce.d.*)
__data_end = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.got : {
*(.got)
} > ps7_ddr_0_HP0_AXI_BASENAME
.got1 : {
*(.got1)
} > ps7_ddr_0_HP0_AXI_BASENAME
.got2 : {
*(.got2)
} > ps7_ddr_0_HP0_AXI_BASENAME
.eh_frame : {
*(.eh_frame)
} > ps7_ddr_0_HP0_AXI_BASENAME
.jcr : {
*(.jcr)
} > ps7_ddr_0_HP0_AXI_BASENAME
.gcc_except_table : {
*(.gcc_except_table)
} > ps7_ddr_0_HP0_AXI_BASENAME
.sdata : {
. = ALIGN(8);
__sdata_start = .;
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
__sdata_end = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.sbss (NOLOAD) : {
. = ALIGN(4);
__sbss_start = .;
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
. = ALIGN(8);
__sbss_end = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.tdata : {
__tdata_start = .;
*(.tdata)
*(.tdata.*)
*(.gnu.linkonce.td.*)
__tdata_end = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.tbss : {
__tbss_start = .;
*(.tbss)
*(.tbss.*)
*(.gnu.linkonce.tb.*)
__tbss_end = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.bss (NOLOAD) : {
. = ALIGN(4);
__bss_start = .;
*(.bss)
*(.bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN(4);
__bss_end = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.local_memory : {
__local_memory_start = .;
*(.local_memory)
__local_memory_end = .;
} > microblaze_0_local_memory_ilmb_bram_if_cntlr_Mem_microblaze_0_local_memory_dlmb_bram_if_cntlr_Mem
_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 );
_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 );
/* Generate Stack and Heap definitions */
.heap (NOLOAD) : {
. = ALIGN(8);
_heap = .;
_heap_start = .;
. += _HEAP_SIZE;
_heap_end = .;
} > ps7_ddr_0_HP0_AXI_BASENAME
.stack (NOLOAD) : {
_stack_end = .;
. += _STACK_SIZE;
. = ALIGN(8);
_stack = .;
__stack = _stack;
} > ps7_ddr_0_HP0_AXI_BASENAME
_end = .;
}