ArtyA7的Hello Word创建Microblaze嵌入式系统硬件工程的问题解决

[Timing 38-282] The design failed to meet the timing requirements.

[Timing 38-469] The REFCLK pin of IDELAYCTRL Sytem_i/mig_7series_0/u_Sytem_mig_7series_0_0_mig/u_iod

[Timing 38-282] The design failed to meet the timing requirements.
[Timing 38-469] The REFCLK pin of IDELAYCTRL

Sytem_i/mig_7series_0/u_Sytem_mig_7series_0_0_mig/u_iod
在使用Arty A7板子开发时，惨考帖子【Arty-A7入门连载】Vivado中为Arty A7创建MicroBlaze嵌入式系统硬件工程会有上面的错误，原因是教程中说的接线错了，要按照图片中的接线，mig_7series_0的clk_ref_i需要接clk_wiz_0的clk_out2，同时sys_clk_i需要接clk_out1,这篇教程在这里弄反了，评论区也有人指出，大家不要接错哈。