1:MTK 6737 Flash配置


一:MTK 平台查看eMMC和DDR的工作频率
    eMMC:
     adb shell cat /sys/kernel/debug/mmc0/clock
    DDR:
     adb shell cat /sys/bus/platform/drivers/emi_clk_test/read_dram_data_rate
1. 获取 flash id:
    cat /sys/block/mmcblk0/device/cid
    
    kernel-3.18\drivers\mmc\core\Mmc.c
    MMC_DEV_ATTR(cid, "%08x%08x%08x%08x\n", card->raw_cid[0], card->raw_cid[1]

    通过Flash Tool读去机器上的flash ID,进而判断机器上贴的是哪颗flash
    关闭Flash Tool, 重新打开
        download
            菜单中“Help” -> open logs folder - "SP_FT_Dump_01-21-2019-13-34-04" -> BROM_DLL_V5.log
               搜索“ID” -> "DEBUG: EMMCDeviceCheck::Dump(): [MVG INFO]: ID(0x13014E51324A39365210030A8085A3B3)"
二:增加 flash.步骤
    1:判断 MCU 型号 在个文件添加
         ls vendor/mediatek/proprietary/bootable/bootloader/preloader/tools/emigen/MT6735/
            emigen.pl  MemoryDeviceList_MT6735M.xls  MemoryDeviceList_MT6735.xls  MemoryDeviceList_MT6737M.xls  MemoryDeviceList_MT6737T.xls
            我通过./vendor/mediatek/proprietary/bootable/bootloader/preloader/custom/hys6737m_35_m0/hys6737m_35_m0.mk
            4:MACH_TYPE=mt6737m
            在 MemoryDeviceList_MT6737M 中添加时序
    2:ddr时序
        ddr认证列表和时序集成(mtk或者ddr原厂提供)
        调试flash首先是id,mtk的规则是id匹配才能下载,id是可以通过datasheet或者工具来读出。
        然后是时序,这一部分得有专门的工具和仪器,作为屌丝的我只能是猜
        没有的到MTK online找
                1.MTK online首页
                2.QVL/DRL(新版合格器件清单)(左上角)
                3. Step 1 : Select Product Line : Phone/Wearable
                    Step 2 : Select Component :    Memory
                    Step 3 : Select Sub Type : eMMC+LPDDR3
                    Step 4 : Select Chips / Platforms : MT6737M &&     MT6737
                    Step 5 : Select Qualify Status : Qualifying
                    Step 6 : Find
                4.download
                5.添加到MemoryDeviceList_MT6737M.xls
    3: 添加 flash
        MemoryDeviceList_MT6737M.xls
        vendor/mediatek/proprietary/bootable/bootloader/preloader/custom/hys6737m_35_m0/inc/custom_MemoryDevice.h 
         #define BOARD_ID                MT6735_EVB             // 兼容了 8种
         //1+8
         #define CS_PART_NUMBER[0]       08EMCP08_NL2DT227
         #define CS_PART_NUMBER[1]       H9TP64A8JDMCPR_KGM
         #define CS_PART_NUMBER[2]       TYC0FH121638RA
         #define CS_PART_NUMBER[3]       08EMCP08_NL2CV100
         #define CS_PART_NUMBER[4]       KMK7X000VM_B314
         #define CS_PART_NUMBER[5]       SD7DP28C_8G
         #define CS_PART_NUMBER[6]       H9TP65A8JDACPR_KGM
         #define CS_PART_NUMBER[7]       KMK7U000VM_B309             

    4:查看out目录查看编译的flash型号,及DDR时序
        ./out/target/product/hys6737m_35_m0/obj/PRELOADER_OBJ/inc/custom_emi.h         
          EMI_SETTINGS emi_settings[] =
          {      
              //08EMCP08_NL2DT227
              {
                  0x0,        /* sub_version */
                  0x0202,     /* TYPE */
                  9,      /* EMMC ID/FW ID checking length */
                  0,      /* FW length */
                  {0x70,0x01,0x00,0x45,0x48,0x38,0x45,0x42,0x38,0x0,0x0,0x0,0x0,0x0,0x0,0x0},     /* NAND_EMMC_ID */
                  {0x0,0x0,0x0,0x0,0x0,0x0,0x0,0x0},      /* FW_ID */
                  0x00025052,     /* EMI_CONA_VAL */
                  0xAA00AA00,     /* DRAMC_DRVCTL0_VAL */
                  0xAA00AA00,     /* DRAMC_DRVCTL1_VAL */
                  0x44584493,     /* DRAMC_ACTIM_VAL */
                  0x01000000,     /* DRAMC_GDDR3CTL1_VAL */
                  0xF0048483,     /* DRAMC_CONF1_VAL */
                  0xA00632D1,     /* DRAMC_DDR2CTL_VAL */
                  0xBF080401,     /* DRAMC_TEST2_3_VAL */
        到这flash 就添加好了 
三:有的可能烧入不了,或者无法开就需要调节 时序 电压和频率  

1、修改DDR时序
    vendor/mediatek/proprietary/bootable/bootloader/preloader/tools/emigen/MT6735/MemoryDeviceList_MT6737M.xls
    1. 其中 H9CCNNN8GTMLAR 为 2G DRAM(8192+8192),可配置为1G DRAM(8192 或 4096+4096),其余均不需动
    2. 其中MODE_REG3由“0x00020003”修改为“0x00010003” -> 增强驱动能力
    3. 其中CONA_VAL不对会导致编译报错
     Samsung     KMK7U000VM_B309    MCP(eMMC+LPDDR2)    4096+4096    MT6735_EVB    0x1501004B375530304D (4096+4096) 1GDRAM
     KMK7U000VM_B309    Samsung    2048    2048    128    0    0    0    0    7634944    7460                    (7460)   8GDROM


2、修改DDR频率 - 需要关闭DVFS
    1. vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/src/drivers/pll2.c
        void mt_pll_post_init(void)
        +    /*
                if (D2Plus == 1) {
                    mt_mempll_init(DDR1280, PLL_MODE_1);
                    memfreq_val = 1280000;
                } else {
                    mt_mempll_init(DDR1066, PLL_MODE_1);
                    memfreq_val = 1066000;
                }
        +    */
        +    mt_mempll_init(DDR1066, PLL_MODE_1);    // DDR800
        +    memfreq_val = 1066000;                    // 800000

    2. 如果缺少所需频率,可以自己添加:
        vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/src/drivers/pll2.c
        void mt_mempll_init(int type, int pll_mode)
            else  if (type == DDR850) 
            {
                *((UINT32P)(DDRPHY_BASE + (0x0183 <<2))) = (*((UINT32P)(DDRPHY_BASE + (0x0183 <<2))) & (~mempll2_vco_div_sel)) | 0x00000000; //RG_MEMPLL2_VCO_DIV_SEL =0;
                *((UINT32P)(DDRPHY_BASE + (0x0185 <<2))) = (*((UINT32P)(DDRPHY_BASE + (0x0185 <<2))) & (~mempll3_vco_div_sel)) | 0x00000000; //RG_MEMPLL3_VCO_DIV_SEL =0;
                *((UINT32P)(DDRPHY_BASE + (0x0187 <<2))) = (*((UINT32P)(DDRPHY_BASE + (0x0187 <<2))) & (~mempll4_vco_div_sel)) | 0x00000000; //RG_MEMPLL4_VCO_DIV_SEL =0;
                *((UINT32P)(DDRPHY_BASE + (0x0189 <<2))) = (*((UINT32P)(DDRPHY_BASE + (0x0189 <<2))) & (~pllc1_dmss_pcw_ncpo_30_0)) | (0x338da215 << 1); //RG_DMSS_PCW_NCPO[30:0]
               
                if ((pll_mode == PLL_MODE_3) || (pll_mode == PLL_MODE_2))
                {
                    *((UINT32P)(DDRPHY_BASE + (0x0182 <<2))) = (*((UINT32P)(DDRPHY_BASE + (0x0182 <<2))) & (~mempll2_fbdiv_6_0)) | (0x0000000d << 2); //RG_MEMPLL2_FBDIV = 7'h0d;
                    *((UINT32P)(DDRPHY_BASE + (0x0184 <<2))) = (*((UINT32P)(DDRPHY_BASE + (0x0184 <<2))) & (~mempll3_fbdiv_6_0)) | (0x0000000d << 2); //RG_MEMPLL3_FBDIV = 7'h0d;
                    *((UINT32P)(DDRPHY_BASE + (0x0186 <<2))) = (*((UINT32P)(DDRPHY_BASE + (0x0186 <<2))) & (~mempll4_fbdiv_6_0)) | (0x0000000d << 2); //RG_MEMPLL4_FBDIV = 7'h0d;
                }
                else
                {
                    *((UINT32P)(DDRPHY_BASE + (0x0182 <<2))) = (*((UINT32P)(DDRPHY_BASE + (0x0182 <<2))) & (~mempll2_fbdiv_6_0)) | (0x00000034 << 2); //RG_MEMPLL2_FBDIV = 7'h34;
                    *((UINT32P)(DDRPHY_BASE + (0x0184 <<2))) = (*((UINT32P)(DDRPHY_BASE + (0x0184 <<2))) & (~mempll3_fbdiv_6_0)) | (0x00000034 << 2); //RG_MEMPLL3_FBDIV = 7'h34;
                    *((UINT32P)(DDRPHY_BASE + (0x0186 <<2))) = (*((UINT32P)(DDRPHY_BASE + (0x0186 <<2))) & (~mempll4_fbdiv_6_0)) | (0x00000034 << 2); //RG_MEMPLL4_FBDIV = 7'h34;
                }
            }
        vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/src/drivers/inc/pll2.h
        enum {
            DDR533   = 533,
        +    DDR850    = 850,
            DDR938   = 938,
            DDR1066  = 1066,
            DDR1280  = 1280,
            DDR1333  = 1333,
            DDR1466  = 1466,
        };
    
    3.4两步骤关闭DVFS(动态电压频率调节) - 不修改的话内核会动态调节,修改频率不会生效
    3. alps\vendor\mediatek\proprietary\bootable\bootloader\preloader\platform\mt6735\src\drivers\inc\dramc2.h
        -    #define ENABLE_DFS
        +    //#define ENABLE_DFS

    4. alps/kernel-3.18/drivers/misc/mediatek/base/power/mt6735/mt_vcore_dvfs_2.c
        -    static bool feature_en __nosavedata = 1;       /* if feature disable, then keep HPM */
        +    static bool feature_en __nosavedata = 0;       /* if feature disable, then keep HPM */

3、修改DDR电压
    电压调节函数
      pmic_Vcore_adjust(); 
      pmic_Vmem_adjust(); 
      pmic_Vmem_Cal_adjust(); 
    方法一:
    vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/src/drivers/emi.c 
        else if ((emi_set->type & 0xF) == TYPE_LPDDR3)
        {
            #ifdef REXTDN_ENABLE
                ett_rextdn_sw_calibration();
            #endif
        +    pmic_config_interface(MT6328_SLDO_ANA_CON0, 0, 0x3, 0);        // 1.24V 参数中第一位寄存器值,第二位就是我们要设的电压值,第三位读取位数
        +    pmic_config_interface(MT6328_SLDO_ANA_CON1, 0x0D, 0xF, 8);    // +0.6V

    方法二:
    1. 在preloader初始化的时候添加调整DDR电压的步骤
        vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/src/drivers/platform.c
            void platform_pre_init(void)
            {
                mtk_timer_init();
                g_boot_time = get_timer(0);
                mtk_uart_init(UART_SRC_CLK_FRQ, CFG_LOG_BAUDRATE);
                mt_gpio_init();
                clk_buf_all_on();
                pwrap_init_preloader();

                i2c_hw_init();
                check_charger_boost_status();
            #if !CFG_FPGA_PLATFORM
                pmic_ret = pmic_init();
        +    #ifdef DRAM_HQA
        +        dram_HQA_adjust_voltage();
        +    #endif
                mt_pll_post_init();
            #endif

    2. 添加一些宏用做选择电压等级
        vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/src/drivers/inc/emi.h
            +    #define DRAM_HQA 
            +    #define HVcore
            +    //#define NV
            +    //#define LVcore
            +    //#define HVcore_LVmem
            +    //#define LVcore_HVmem

    3. 实现调整电压的函数
       vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/src/drivers/emi.c 
    -    #ifdef pmic_HQA_TCs        // 此宏没开
    +    #if 1
    +    void dram_HQA_adjust_voltage(void)
        {
            #ifdef HVcore  //HV (Vc=1.375V, Vm=1.3V
                pmic_Vcore_adjust(1); // 1.24V          
                pmic_Vmem_adjust(1);  // 1.39V
                pmic_Vmem_Cal_adjust(0);  // +0.10V (1.3V)                
                print("[DRAM HQA]========== HV ==========\r\n");    // LOG 显示走这里
            #endif

            #ifdef NV     //NV (Vc=1.15V, Vm=1.22V)
                pmic_Vcore_adjust(1); // 1.15V       
                pmic_Vmem_adjust(0);  // 1.20V
                pmic_Vmem_Cal_adjust(1);  // +0.02V (1.22V)            
                print("[DRAM HQA]========== NV ==========\r\n");
            #endif

            #ifdef LVcore //LV (Vc=1.09375V, Vm=1.16V
                pmic_Vcore_adjust(2); // 1.09375V
                pmic_Vmem_adjust(0);  // 1.20V
                pmic_Vmem_Cal_adjust(2);  // -0.04V(1.16V)        
                print("[DRAM HQA]========== LV ==========\r\n");
            #endif

            #ifdef HVcore_LVmem   //HVcore_LVmem (Vc=1.375V, Vm=1.16V)
                pmic_Vcore_adjust(0); // 1.375V          
                pmic_Vmem_adjust(0);  // 1.20V
                pmic_Vmem_Cal_adjust(2);  // -0.04V(1.16V)              
                print("[DRAM HQA]========== HVcLVm ==========\r\n");
            #endif

            #ifdef LVcore_HVmem   //LVcore_HVmem (Vc=1.09375V, Vm=1.3V)
                pmic_Vcore_adjust(2); // 1.09375V
                pmic_Vmem_adjust(0);  // 1.20V
                pmic_Vmem_Cal_adjust(0);  // +0.10V (1.3V)                      
                print("[DRAM HQA]========== LVcHVm ==========\r\n");
            #endif
    +    }

4、打开DDR重新校验 - 使每次回复出厂设置后DDR重新校验
    适用于eng版
     vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/src/drivers/inc/emi.h
        -    #define DDR_RESERVE_MODE
        +    //#define DDR_RESERVE_MODE
5:开机重启 一般是emmc速度问题
        kernel-3.18/arch/arm/boot/dts/hys6737m_35_m0.dts
                msdc-sys-suspend;
                mmc-ddr-1_8v;
                mmc-hs200-1_8v;
-               mmc-hs400-1_8v;
                non-removable;
                pinctl = <&mmc0_pins_default>;
                register_setting = <&mmc0_register_setting_default>;
                
eMMC 里 DDR52 HS200 HS400 这些名词指的是不同的速度

    DDR52就是最高 52M clock,数据速率就是 52 x 2 = 104
    HS200 就是最高 200M clock,单通道,数据速率也是 200
    HS400 也是最高 200M clock,但是是双通道,所以数据速率是 200 x 2 = 400

    HS200和HS400 是 5.0 协议才有的。
    
Modename        Data Rate IO voltage  Bus Width Frequency  Max Data Transfer
MMC card        Single     3/1.8/1.2V    1,4,8    0-26MH            26MB/s
HightSpeedSDR    Single        3/1.8/1.2V    1,4,8    0-52MH            52MB/s
HightSpeedSDR    Dual        3/1.8/1.2V    4,8        0-52MH            104MB/s
HS200            Single        1.8/1.2V    4,8        0-200MH            200MB/s
HS400            Dual        1.8/1.2V    8        0-200MH            400MB/s
    
五:判断 MCU 型号
    ./vendor/mediatek/proprietary/bootable/bootloader/preloader/custom/hys6737m_35_m0/hys6737m_35_m0.mk
        4:MACH_TYPE=mt6737m
    ./vendor/mediatek/proprietary/bootable/bootloader/preloader/custom/hys6737m_35_m0/hys6737m_35_m0.mk
        24:export MTK_PLATFORM MACH_TYPE
    ./vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/feature.mak:529
        C_OPTION += -DMACH_TYPE_$(shell echo $(MACH_TYPE) | tr '[a-z]' '[A-Z]')
        //C_OPTION +=DMACH_TYPE_MT6737M
./vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/feature.mak:530:export MACH_TYPE
./vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/src/drivers/makefile 
    ifeq ("$(MACH_TYPE)","mt6735")
        MOD_SRC  += pll.c
        MOD_SRC  += mt_ptp.c
    endif

    ifeq ("$(MACH_TYPE)","mt6737m")            //mt6737m  频率调节
        MOD_SRC  += pll2.c
        MOD_SRC  += mt_ptp.c
    endif
./vendor/mediatek/proprietary/bootable/bootloader/preloader/tools/emigen/emigen.mk 
    EMIGEN_FILE_LIST := $(addprefix $(EMIGEN_OUT)/,$(ALL_EMIGEN_FILE))
    CUSTOM_MEMORY_HDR := $(MTK_PATH_CUSTOM)/inc/custom_MemoryDevice.h
    ifeq ($(MACH_TYPE),mt6735m)
    MEMORY_DEVICE_XLS := $(D_ROOT)/tools/emigen/MT6735/MemoryDeviceList_MT6737T.xls
    else ifeq ($(MACH_TYPE),mt6737m)                                                //mt6737m  增加flash exce表
    MEMORY_DEVICE_XLS := $(D_ROOT)/tools/emigen/MT6735/MemoryDeviceList_MT6737M.xls
    else
    MEMORY_DEVICE_XLS := $(D_ROOT)/tools/emigen/$(MTK_PLATFORM)/MemoryDeviceList_$(MTK_PLATFORM).xls  
    endif
    ifeq ($(PLATFORM), mt2601)
    MEMORY_DEVICE_XLS := $(TOOL_PATH)/emigen/$(MTK_PLATFORM)/MemoryDeviceList_$(MTK_PLATFORM).xls  
    EMIGEN_SCRIPT := $(TOOL_PATH)/emigen/$(MTK_PLATFORM)/emigen.pl
    else
    EMIGEN_SCRIPT := $(D_ROOT)/tools/emigen/$(MTK_PLATFORM)/emigen.pl
    endif
vendor/mediatek/proprietary/bootable/bootloader/preloader/platform/mt6735/src/drivers/inc/pll.h    
    #ifndef PLL_H
    #define PLL_H

    #if defined(MACH_TYPE_MT6735) || defined(MACH_TYPE_MT6737T)
        #include "pll1.h"
    #elif defined(MACH_TYPE_MT6735M) || defined(MACH_TYPE_MT6737M)
        #include "pll2.h"
    #elif defined(MACH_TYPE_MT6753)
        #include "pll3.h"
    #endif

    #endif            //判断调用哪个 pll
    

你可能感兴趣的:(MTK)