FPGA vs ASIC

ASIC(Application Specific Integrated Circuit) is a type of IC that is designed with a certain purpose, the function of ASIC is fixed after production. 

Advantages: High performance, high speed, low power, low cost.

FPGA(Field Programmable Gate Array) is a type of IC, that does not have the programming built into it during the production

Advantages: Reconfigurability,  low development costs, high flexibility, faster to market

ASIC design flow: 

Frontend: Synthesis, Timing Analysing (Major tool: Synopsys)

Backend: Floorplanning, Routing, design for manufacturing (Major tool: Cadence)

FPGA design flow: 

Difference:
1. As we can see from above, FPGA design flow is much simpler than ASIC design flow.

It doesn't matter what you want to put on an FPGA, you can start with logic blocks(always consist of  LUT and register), PLL, On-chip ram, I/O buffers etc. but ASIC needs to be signed specifically for certain functions.

ASIC need to insert Design for testing(DFT), ATPG, BIST,  Scan chain(JTAG) etc before synthesis. 

ASIC needs floor planning tool to help place components, insert Clock tree, scan chains, I/O rings.

2. Other difference

Clock:  FPGA  has dedicated clock routing networks, and it has clock management resources so that user can change the frequency. Things are different in ASIC, the PLL needs of an ASIC designer vary too much from one design to the next, so ASIC doesn't have the flexibility. 

Reset:

FPGA can specify the initial flip-flop(FF) conditions can be specified, it can set FF to the initial values you specify. But in ASIC, FF start with random initial values. The "initial" statement within Verilog cannot be synthesized by the ASIC tools. 

Reference:

https://zipcpu.com/blog/2017/10/13/fpga-v-asic.html