imut_du FPGA第三次作业

作业

验证

画出真值表，

仿真验证

代码参考：提取码：1111
VHDL描述思维导图

一、VHDL描述语句实验基础
根据开发手册查阅 LED灯引脚

根据原理图

知 当 FPGA的引脚输出为逻辑 0 时，LED 会熄灭。输出为逻辑 1 时，LED 被点亮

二、VHDL编程

1、简单赋值语句

---简单赋值语句
library ieee;
use ieee.std_logic_1164.all;
entity fuxi is
  port(clk_in:in std_logic;---没用上
        y:out std_logic_vector(3 downto 0));
end fuxi;

architecture a of fuxi is
begin
y(3 downto 0)<="0101";
end a;

将四个LED灯设置成输出0101即只有LED1、LED3亮，LED0、LED2不亮
下载过程见上一篇博客参考

下载结果如下

2、条件复制if then 实现计数满2999999LED高低电平翻转

---条件赋值语句
library ieee;
use ieee.std_logic_1164.all;
entity fuxi is
  port(clk_in:in std_logic;--输入脉冲
 
        y:out std_logic_vector(3 downto 0));
end fuxi;

architecture a of fuxi is
signal flag:std_logic;
begin
clock:process(clk_in)
       variable number : integer range 0 to 3999999; 
		 variable clk_flag:std_logic;
		 begin 
		 if(clk_in' event and clk_in='1')then 
		      if(number=2999999)then
		          number:=0;
				    clk_flag:=not clk_flag;    --定时满  标志位 实现LED灯翻转
				 else
				     number:=number+1;
				 end if;
			end if;
			flag<=clk_flag;
		   end process;
			
y(3 downto 0)<="0110"when flag='1'else "1001";
  
end a;

结果如下

注意：计数值number要足够大不然计数不够长肉眼看不见

3、选择赋值语句，按键KEY3按下，输出0001不按下输出0011
此实验引入输入选择信号SEL，以实验板上的按键来模拟，查阅手册知开发板按键手册如下


由图按键按下为低电平
此时在管脚中新添加按键输入选择管脚

---选择赋值语句
library ieee;
use ieee.std_logic_1164.all;
entity fuxi is
  port(clk_in:in std_logic;--输入脉冲
        SEL: IN STD_LOGIC;
        y:out std_logic_vector(3 downto 0));
end fuxi;

architecture a of fuxi is

begin
  with SEL select
y(3 downto 0) <= "0001" WHEN '0',---亮一个灯
       "0011" WHEN '1',---亮2个灯
       "0000" WHEN OTHERS; ---全灭
			
end a;

其上语句和下面的case语句功能一致

—选择赋值语句case

library ieee;
use ieee.std_logic_1164.all;
entity fuxi is
  port(clk_in:in std_logic;--输入脉冲
        SEL: IN STD_LOGIC;
        y:out std_logic_vector(3 downto 0));
end fuxi;

architecture a of fuxi is

begin
	process (SEL)
		begin
		case SEL is
		when '0' => y(3 downto 0)  <= "0001";
		when '1' => y(3 downto 0)  <= "0011";
		when others => y(3 downto 0)  <= "0000";
		end case;
	end process;			
end a;

演示略
4、移位熄灭LED灯
移位运算参考大佬移位运算

library ieee;
use ieee.std_logic_1164.all;

entity fuxi is
  port(clk_in,SEL:in std_logic;
        y:out std_logic_vector(3 downto 0));
end fuxi;

architecture a of fuxi is
signal clk:std_logic;
   begin
   clock:process(clk_in)
       variable clock_buffer:std_logic;
       variable count_time:integer range 0 to 3999999;
       begin
       if (clk_in'event and clk_in='1' )then
         if (count_time=3999999 )then
            count_time:=0;
            clock_buffer:=not clock_buffer;
         else
            count_time:=count_time+1;
         end if;
       end  if;
       clk<=clock_buffer;
     end process;
  
process(SEL,clk)
  variable q:std_logic_vector(3 downto 0);
  begin
      if(SEL='0') then
        q:="1111";
      else
        if(clk'event and clk='1')then
        q:=q(2 downto 0)&'0';
        end if;
      end if;
   y<=q;
end process;
end a;

尚待解决
wait for 10ns报错