Coursework 1Computer Processors (COMP1212)The files required to complete this coursework are available on GitLab.You should complete the coursework in the files provided, do not renameany of the files or change the directory structure.Submission You must submit your work via GitLab and also on the Minerva.1. GitLab: Ensure that all changes have been committed and pushedbefore the deadline. You should commit frequently.2. Minerva: Ensure that the coursework directory is compressed intoa .tar.gz archive and submitted to the Minerva.Late submissions are accepted up to 7 days late. Each day, or part ofa day, will incur a 5% penalty.Deadline TBC.Weighting This piece of summative coursework is worth 15% of your grade.This coursework involves implementing components of a computer processorcovered in the lectures. You should provide an implementation of eachof the following components in hdl. You are provided with a description ofthe behaviour of each of the components as well as test files to ensure itbehaves according to specification.Implement the following .hdl files- And.hdl- Or.hdl- Not.hdl- Xor.hdl- Mux.hdl- DMux.hdl- And16.hdl1- Or16.hdl- Not16.hdl- Mux16.hdl- Or8Way.hdl- Mux4Way16.hdl- Mux8Way16.hdl- DMux4Way.hdl- DMux8Way.hdlThe reflective account is submitted via a Minerva test.MarkingThe marking of the .hdl files is automated so it is important that you do notrename or alter the directory structure of your submission from that providedon GitLab and Minerva. Marks will be allocated in the following way:- 10 marks for correct implementation of the components according totheir specification- 5 marks for minimising complexity of the implementations2Chip descriptionsChip name: AndInputs: x, yOutputs: outFunction: out = 1 if (x == 1 and y == 1) 0 otherwiseChip 代写COMP1212作业、代做c/c++，Java程序语言作业、代做Python实验作业、代写GitLab作业 代写留学name: OrInputs: x, yOutputs: outFunction: out = 1 if (x == 1 or y == 1) 0 otherwiseChip name: NotInputs: xOutputs: outFunction: out = not xChip name: XorInputs: x, yOutputs: outFunction: out = not (x == y)3Chip name: MuxInputs: x, y,selOutputs: outFunction: If sel == 1 then out = y else out= xChip name: DMuxInputs: in,selOutputs: x, yFunction: {x, y} = {in, 0} if sel == 0 {0, in} if sel == 1Chip name: And16Inputs: x[16], y[16]Outputs: out[16]Function: For i = 0 . . . 15 out[i] = x[i] and y[i]Chip name: Or16Inputs: x[16], y[16]Outputs: out[16]Function: For i = 0 . . . 15 out[i] = x[i] or y[i]4Chip name: Not16Inputs: x[16]Outputs: out[16]Function: For i = 0 . . . 15 out[i] = not x[i]Chip name: Mux16Inputs: x[16], y[16],selOutputs: out[16]Function: If sel == 1 then out = y else out = xChip name: Or8WayInputs: x[8]Outputs: outFunction: out = x[0] or x[1] or . . . or x[7]5Chip name: Mux4Way16Inputs: w[16], x[16], y[16], z[16], sel[2]Outputs: out[16]Function: out = w if sel == 00x if sel == 01y if sel == 10z if sel == 11Chip name: Mux8Way16Inputs: s[16], t[16], u[16], v[16], w[16], x[16], y[16], z[16], sel[3]Outputs: out[16]Function: out = s if sel == 000t if sel == 001u if sel == 010v if sel == 011w if sel == 100x if sel == 101y if sel == 110z if sel == 1116Chip name: DMux4WayInputs: in,sel[2]Outputs: w, x, y, zFunction: (w, x, y, z) = (in, 0, 0, 0) if sel == 00(0, in, 0, 0) if sel == 01(0, 0, in, 0) if sel == 10(0, 0, 0, in) if sel == 11Chip name: DMux8WayInputs: in,sel[2]Outputs: s, t, u, v, w, x, y, zFunction: (s, t, u, v, w, x, y, z) =(in, 0, 0, 0, 0, 0, 0, 0) if sel == 000(0, in, 0, 0, 0, 0, 0, 0) if sel == 001etc.(0, 0, 0, 0, 0, 0, 0, in) if sel == 1117转自：http://www.7daixie.com/2019050430752768.html
