https://verificationacademy.com/verification-methodology-reference/uvm/docs_1.1a/html/files/reg/sequences/uvm_reg_bit_bash_seq-svh.html
This section defines classes that test individual bits of the registers defined in a register model.
Contents
Bit Bashing Test Sequences | This section defines classes that test individual bits of the registers defined in a register model. |
uvm_reg_single_bit_bash_seq | Verify the implementation of a single register by attempting to write 1’s and 0’s to every bit in it, via every address map in which the register is mapped, making sure that the resulting value matches the mirrored value. |
uvm_reg_bit_bash_seq | Verify the implementation of all registers in a block by executing the uvm_reg_single_bit_bash_seq sequence on it. |
Verify the implementation of a single register by attempting to write 1’s and 0’s to every bit in it, via every address map in which the register is mapped, making sure that the resulting value matches the mirrored value.
If bit-type resource named “NO_REG_TESTS” or “NO_REG_BIT_BASH_TEST” in the “REG::” namespace matches the full name of the register, the register is not tested.
uvm_resource_db#(bit)::set({"REG::",regmodel.blk.r0.get_full_name()}, "NO_REG_TESTS", 1, this);
Registers that contain fields with unknown access policies cannot be tested.
The DUT should be idle and not modify any register durign this test.
Summary
uvm_reg_single_bit_bash_seq | |||||||||||
Verify the implementation of a single register by attempting to write 1’s and 0’s to every bit in it, via every address map in which the register is mapped, making sure that the resulting value matches the mirrored value. | |||||||||||
Class Hierarchy | |||||||||||
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Class Declaration | |||||||||||
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Variables | |||||||||||
rg | The register to be tested |
uvm_reg rg
The register to be tested
Verify the implementation of all registers in a block by executing the uvm_reg_single_bit_bash_seq sequence on it.
If bit-type resource named “NO_REG_TESTS” or “NO_REG_BIT_BASH_TEST” in the “REG::” namespace matches the full name of the block, the block is not tested.
uvm_resource_db#(bit)::set({"REG::",regmodel.blk.get_full_name(),".*"}, "NO_REG_TESTS", 1, this);
Summary
uvm_reg_bit_bash_seq | |||||||||||
Verify the implementation of all registers in a block by executing the uvm_reg_single_bit_bash_seq sequence on it. | |||||||||||
Class Hierarchy | |||||||||||
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Class Declaration | |||||||||||
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Variables | |||||||||||
model | The block to be tested. | ||||||||||
reg_seq | The sequence used to test one register | ||||||||||
Methods | |||||||||||
body | Executes the Register Bit Bash sequence. | ||||||||||
do_block | Test all of the registers in a a given block | ||||||||||
reset_blk | Reset the DUT that corresponds to the specified block abstraction class. |
The block to be tested. Declared in the base class.
uvm_reg_block model;
protected uvm_reg_single_bit_bash_seq reg_seq
The sequence used to test one register
virtual task body()
Executes the Register Bit Bash sequence. Do not call directly. Use seq.start() instead.
protected virtual task do_block( uvm_reg_block blk )
Test all of the registers in a a given block
virtual task reset_blk( uvm_reg_block blk )
Reset the DUT that corresponds to the specified block abstraction class.
Currently empty. Will rollback the environment’s phase to the reset phase once the new phasing is available.
In the meantime, the DUT should be reset before executing this test sequence or this method should be implemented in an extension to reset the DUT.