经过验证,以下步骤在linux-2.6.30上移植成功。
1,修改drivers/net/arm/Makefile文件添加:
obj-$(CONFIG_ARM_CS8900) += cs8900.o
2,修改drivers/net/arm/Kconfig文件添加:
config ARM_CS8900
tristate "CS8900 support"
depends on NET_ETHERNET && ARM && ARCH_SMDK2410
help
support for cs8900 chipset based Ethernet cards , if you have a network card of this type
3,编译配置内核
# make menuconfig
Device Drivers --->
[*] Network device support --->
[*] Ethernet (10 or 100Mbit) --->
<*> CS8900 support
4,修改arch/arm/mach-s3c2440/mach-smdk2440.c文件
static struct map_desc smdk2440_iodesc[] __initdata最后添加:
,{
.virtual = vSMDK2410_ETH_IO,
.pfn = __phys_to_pfn(S3C2410_CS3 + (1<<24)),
.length = SZ_1M,
.type = MT_DEVICE,
}
# vi arch/arm/mach-s3c2410/mach-smdk2410.c
在static struct map_desc smdk2410_iodesc[] __initdata 最后添加:
,{
.virtual = vSMDK2410_ETH_IO,
.pfn = __phys_to_pfn(S3C2410_CS3 + (1<<24)),
.length = SZ_1M,
.type = MT_DEVICE,
}
5,修改arch/arm/mach-s3c2410/include/mach/map.h文件增加:
/* CS8900 */
#define pSMDK2410_ETH_IO __phys_to_pfn(0x19000000)
#define vSMDK2410_ETH_IO 0xE0000000
#define SMDK2410_ETH_IRQ IRQ_EINT9
6.把以下两个文件cs8900.c cs8900.h添加进drivers/net/arm/内,然后编译内核。
附件:
注意:如果想了解我的网卡和2440的接线原理图可以email:[email protected]
//8900.c
/*
* linux/drivers/net/cs8900.c
*
* Author: Abraham van der Merwe <abraham at 2d3d.co.za>
*
* A Cirrus Logic CS8900A driver for Linux
* based on the cs89x0 driver written by Russell Nelson,
* Donald Becker, and others.
*
* This source code is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* History:
* 22-May-2002 Initial version (Abraham vd Merwe)
* 30-May-2002 Added char device support for eeprom (Frank Becker)
* 24-Jan-2004 Fixups for 2.6 (Frank Becker)
* 15-July-2004 Modified for SMDK2410 (Roc Wu pwu at jadechip.com)
*/
#define VERSION_STRING "Cirrus Logic CS8900A driver for Linux (Modified for SMDK2410)"
/*
* At the moment the driver does not support memory mode operation.
* It is trivial to implement this, but not worth the effort.
*/
/*
* TODO:
*
* 1. Sort out ethernet checksum
* 2. If !ready in send_start(), queue buffer and send it in interrupt handler
* when we receive a BufEvent with Rdy4Tx, send it again. dangerous!
* 3. how do we prevent interrupt handler destroying integrity of get_stats()?
* 4. Change reset code to check status.
* 5. Implement set_mac_address and remove fake mac address
* 7. Link status detection stuff
* 8. Write utility to write EEPROM, do self testing, etc.
* 9. Implement DMA routines (I need a board w/ DMA support for that)
* 10. Power management
* 11. Add support for multiple ethernet chips
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/version.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/ioport.h>
#include <linux/pm.h>
#include <linux/irq.h>
#include <mach/hardware.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/fs.h>
#include <asm/mach-types.h>
#ifdef CONFIG_ARCH_SMDK2410
#include "mach/regs-irq.h"
#include "mach/regs-mem.h"
#include "mach/regs-gpio.h"
#include "plat/common-smdk.h"
#endif
#include "cs8900.h"
//#define FULL_DUPLEX
//#define DEBUG
typedef struct {
struct net_device_stats stats;
u16 txlen;
int char_devnum;
spinlock_t lock;
} cs8900_t;
int cs8900_probe (struct net_device *dev);
static struct net_device *cs8900_dev ;
/*
* There seems to be no way to determine the exact size of the eeprom,
* so we use the largest size.
* FIXME: Verify it's safe to read/write past the end of a 64/128
* byte eeprom.
*
* Possible eeprom sizes:
* Cx46 - 64 bytes
* Cx56 - 128 bytes
* Cx66 - 256 bytes
*/
#define MAX_EEPROM_SIZE 256
/*
* I/O routines
*/
static inline u16 cs8900_read (struct net_device *dev,u16 reg)
{
outw (reg,dev->base_addr + PP_Address);
return (inw (dev->base_addr + PP_Data));
}
static inline void cs8900_write (struct net_device *dev,u16 reg,u16 value)
{
outw (reg,dev->base_addr + PP_Address);
outw (value,dev->base_addr + PP_Data);
}
static inline void cs8900_set (struct net_device *dev,u16 reg,u16 value)
{
cs8900_write (dev,reg,cs8900_read (dev,reg) | value);
}
static inline void cs8900_clear (struct net_device *dev,u16 reg,u16 value)
{
cs8900_write (dev,reg,cs8900_read (dev,reg) & ~value);
}
static inline void cs8900_frame_read (struct net_device *dev,struct sk_buff *skb,u16 length)
{
insw (dev->base_addr,skb_put (skb,length),(length + 1) / 2);
}
static inline void cs8900_frame_write (struct net_device *dev,struct sk_buff *skb)
{
outsw (dev->base_addr,skb->data,(skb->len + 1) / 2);
}
/*
* Debugging functions
*/
#ifdef DEBUG
static inline int printable (int c)
{
return ((c >= 32 && c <= 126) ||
(c >= 174 && c <= 223) ||
(c >= 242 && c <= 243) ||
(c >= 252 && c <= 253));
}
static void dump16 (struct net_device *dev,const u8 *s,size_t len)
{
int i;
char str[128];
if (!len) return;
*str = '/0';
for (i = 0; i < len; i++) {
if (i && !(i % 4)) strcat (str," ");
sprintf (str,"%s%.2x ",str,s[i]);
}
for ( ; i < 16; i++) {
if (i && !(i % 4)) strcat (str," ");
strcat (str," ");
}
strcat (str," ");
for (i = 0; i < len; i++) sprintf (str,"%s%c",str,printable (s[i]) ? s[i] : '.');
printk (KERN_DEBUG "%s: %s/n",dev->name,str);
}
static void hexdump (struct net_device *dev,const void *ptr,size_t size)
{
const u8 *s = (u8 *) ptr;
int i;
for (i = 0; i < size / 16; i++, s += 16) dump16 (dev,s,16);
dump16 (dev,s,size % 16);
}
static void dump_packet (struct net_device *dev,struct sk_buff *skb,const char *type)
{
printk (KERN_INFO "%s: %s %d byte frame %.2x:%.2x:%.2x:%.2x:%.2x:%.2x to %.2x:%.2x:%.2x:%.2x:%.2x:%.2x type %.4x/n",
dev->name,
type,
skb->len,
skb->data[0],skb->data[1],skb->data[2],skb->data[3],skb->data[4],skb->data[5],
skb->data[6],skb->data[7],skb->data[8],skb->data[9],skb->data[10],skb->data[11],
(skb->data[12] << 8) | skb->data[13]);
if (skb->len < 0x100) hexdump (dev,skb->data,skb->len);
}
#endif /* #ifdef DEBUG */
/*
* Driver functions
*/
static void cs8900_receive (struct net_device *dev)
{
cs8900_t *priv = (cs8900_t *) dev->ml_priv;
struct sk_buff *skb;
u16 status,length;
status = cs8900_read (dev,PP_RxStatus);
length = cs8900_read (dev,PP_RxLength);
if (!(status & RxOK)) {
priv->stats.rx_errors++;
if ((status & (Runt | Extradata))) priv->stats.rx_length_errors++;
if ((status & CRCerror)) priv->stats.rx_crc_errors++;
return;
}
if ((skb = dev_alloc_skb (length + 4)) == NULL) {
priv->stats.rx_dropped++;
return;
}
skb->dev = dev;
skb_reserve (skb,2);
cs8900_frame_read (dev,skb,length);
#ifdef FULL_DUPLEX
dump_packet (dev,skb,"recv");
#endif /* #ifdef FULL_DUPLEX */
skb->protocol = eth_type_trans (skb,dev);
netif_rx (skb);
dev->last_rx = jiffies;
priv->stats.rx_packets++;
priv->stats.rx_bytes += length;
}
static int cs8900_send_start (struct sk_buff *skb,struct net_device *dev)
{
cs8900_t *priv = (cs8900_t *) dev->ml_priv;
u16 status;
spin_lock_irq(&priv->lock);
netif_stop_queue (dev);
cs8900_write (dev,PP_TxCMD,TxStart (After5));
cs8900_write (dev,PP_TxLength,skb->len);
status = cs8900_read (dev,PP_BusST);
if ((status & TxBidErr)) {
spin_unlock_irq(&priv->lock);
printk (KERN_WARNING "%s: Invalid frame size %d!/n",dev->name,skb->len);
priv->stats.tx_errors++;
priv->stats.tx_aborted_errors++;
priv->txlen = 0;
return (1);
}
if (!(status & Rdy4TxNOW)) {
spin_unlock_irq(&priv->lock);
printk (KERN_WARNING "%s: Transmit buffer not free!/n",dev->name);
priv->stats.tx_errors++;
priv->txlen = 0;
/* FIXME: store skb and send it in interrupt handler */
return (1);
}
cs8900_frame_write (dev,skb);
spin_unlock_irq(&priv->lock);
#ifdef DEBUG
dump_packet (dev,skb,"send");
#endif /* #ifdef DEBUG */
dev->trans_start = jiffies;
dev_kfree_skb (skb);
priv->txlen = skb->len;
return (0);
}
static irqreturn_t cs8900_interrupt (int irq,void *id)
{
struct net_device *dev = (struct net_device *) id;
cs8900_t *priv;
volatile u16 status;
irqreturn_t handled = 0;
if (dev->ml_priv == NULL) {
printk (KERN_WARNING "%s: irq %d for unknown device./n",dev->name,irq);
return 0;
}
priv = (cs8900_t *) dev->ml_priv;
while ((status = cs8900_read (dev, PP_ISQ))) {
handled = 1;
switch (RegNum (status)) {
case RxEvent:
cs8900_receive (dev);
break;
case TxEvent:
priv->stats.collisions += ColCount (cs8900_read (dev,PP_TxCOL));
if (!(RegContent (status) & TxOK)) {
priv->stats.tx_errors++;
if ((RegContent (status) & Out_of_window)) priv->stats.tx_window_errors++;
if ((RegContent (status) & Jabber)) priv->stats.tx_aborted_errors++;
break;
} else if (priv->txlen) {
priv->stats.tx_packets++;
priv->stats.tx_bytes += priv->txlen;
}
priv->txlen = 0;
netif_wake_queue (dev);
break;
case BufEvent:
if ((RegContent (status) & RxMiss)) {
u16 missed = MissCount (cs8900_read (dev,PP_RxMISS));
priv->stats.rx_errors += missed;
priv->stats.rx_missed_errors += missed;
}
if ((RegContent (status) & TxUnderrun)) {
priv->stats.tx_errors++;
priv->stats.tx_fifo_errors++;
priv->txlen = 0;
netif_wake_queue (dev);
}
/* FIXME: if Rdy4Tx, transmit last sent packet (if any) */
break;
case TxCOL:
priv->stats.collisions += ColCount (cs8900_read (dev,PP_TxCOL));
break;
case RxMISS:
status = MissCount (cs8900_read (dev,PP_RxMISS));
priv->stats.rx_errors += status;
priv->stats.rx_missed_errors += status;
break;
}
}
return IRQ_RETVAL(handled);
}
static void cs8900_transmit_timeout (struct net_device *dev)
{
cs8900_t *priv = (cs8900_t *) dev->ml_priv;
priv->stats.tx_errors++;
priv->stats.tx_heartbeat_errors++;
priv->txlen = 0;
netif_wake_queue (dev);
}
static int cs8900_start (struct net_device *dev)
{
int result;
printk("cs8900_start /n");
set_irq_type(dev->irq, (1<<1)||(1<<0));
printk("enable the ethernet controlle/n");
/* enable the ethernet controller */
cs8900_set (dev,PP_RxCFG,RxOKiE | BufferCRC | CRCerroriE | RuntiE | ExtradataiE);
cs8900_set (dev,PP_RxCTL,RxOKA | IndividualA | BroadcastA);
cs8900_set (dev,PP_TxCFG,TxOKiE | Out_of_windowiE | JabberiE);
cs8900_set (dev,PP_BufCFG,Rdy4TxiE | RxMissiE | TxUnderruniE | TxColOvfiE | MissOvfloiE);
cs8900_set (dev,PP_LineCTL,SerRxON | SerTxON);
cs8900_set (dev,PP_BusCTL,EnableRQ);
#ifdef FULL_DUPLEX
cs8900_set (dev,PP_TestCTL,FDX);
#endif /* #ifdef FULL_DUPLEX */
udelay(200);
/* install interrupt handler */ printk("request_irq /n");
if ((result = request_irq (dev->irq, &cs8900_interrupt, 0, dev->name, dev)) < 0) {
printk (KERN_ERR "%s: could not register interrupt %d/n",dev->name, dev->irq);
return (result);
}
/* start the queue */
netif_start_queue (dev);
return (0);
}
static int cs8900_stop (struct net_device *dev)
{
/* disable ethernet controller */
cs8900_write (dev,PP_BusCTL,0);
cs8900_write (dev,PP_TestCTL,0);
cs8900_write (dev,PP_SelfCTL,0);
cs8900_write (dev,PP_LineCTL,0);
cs8900_write (dev,PP_BufCFG,0);
cs8900_write (dev,PP_TxCFG,0);
cs8900_write (dev,PP_RxCTL,0);
cs8900_write (dev,PP_RxCFG,0);
/* uninstall interrupt handler */
free_irq (dev->irq,dev);
/* stop the queue */
netif_stop_queue (dev);
return (0);
}
static struct net_device_stats *cs8900_get_stats (struct net_device *dev)
{
cs8900_t *priv = (cs8900_t *) dev->ml_priv;
return (&priv->stats);
}
static void cs8900_set_receive_mode (struct net_device *dev)
{
if ((dev->flags & IFF_PROMISC))
cs8900_set (dev,PP_RxCTL,PromiscuousA);
else
cs8900_clear (dev,PP_RxCTL,PromiscuousA);
if ((dev->flags & IFF_ALLMULTI) && dev->mc_list)
cs8900_set (dev,PP_RxCTL,MulticastA);
else
cs8900_clear (dev,PP_RxCTL,MulticastA);
}
/*
* Driver initialization routines
*/
int __init cs8900_probe (struct net_device *dev)
{
static cs8900_t priv;
int i,result;
u16 value;
//unsigned long extint1;
//extint1 = __raw_readl(S3C2410_EXTINT1);
//extint1 &= ~(7<<4);
//extint1 |= (4<<4);
//__raw_writel(extint1, S3C2410_EXTINT1);
printk (VERSION_STRING"/n");
memset (&priv,0,sizeof (cs8900_t));
__raw_writel((__raw_readl(S3C2410_GPGCON)&~(0x3<<2))|(0x2<<2),S3C2410_GPGCON);
__raw_writel((__raw_readl(S3C2410_EXTINT1)&~(0x7<<4))|(0x4<<4),S3C2410_EXTINT1);
__raw_writel(0x2211d110,S3C2410_BWSCON);
__raw_writel(0x1f7c,S3C2410_BANKCON3);
#if defined(CONFIG_ARCH_SMDK2410)
dev->dev_addr[0] = 0x00;
dev->dev_addr[1] = 0x00;
dev->dev_addr[2] = 0x3e;
dev->dev_addr[3] = 0x26;
dev->dev_addr[4] = 0x0a;
dev->dev_addr[5] = 0x00;
#endif
dev->if_port = IF_PORT_10BASET;
dev->ml_priv = (void *) &priv;
spin_lock_init(&priv.lock);
//SET_MODULE_OWNER (dev);
#if defined(CONFIG_ARCH_SMDK2410)
dev->base_addr = (0xE0000000 + 0x300);
dev->irq = IRQ_EINT9;
#endif /* #if defined(CONFIG_ARCH_SMDK2410) */
if ((result = check_mem_region (dev->base_addr, 255))) {
printk (KERN_ERR "%s: can't get I/O port address 0x%lx/n",dev->name,dev->base_addr);
return (result);
}
request_mem_region (dev->base_addr, 16, dev->name);
/* verify EISA registration number for Cirrus Logic */
if ((value = cs8900_read (dev,PP_ProductID)) != EISA_REG_CODE) {
printk (KERN_ERR "%s: incorrect signature 0x%.4x/n",dev->name,value);
return (-ENXIO);
}
/* verify chip version */
value = cs8900_read (dev,PP_ProductID + 2);
if (VERSION (value) != CS8900A) {
printk (KERN_ERR "%s: unknown chip version 0x%.8x/n",dev->name,VERSION (value));
return (-ENXIO);
}
/* setup interrupt number */
cs8900_write (dev,PP_IntNum,0);
printk (KERN_INFO "%s: CS8900A rev %c at %#lx irq=%d",
dev->name,'B' + REVISION (value) - REV_B, dev->base_addr, dev->irq);
for (i = 0; i < ETH_ALEN; i += 2)
cs8900_write (dev,PP_IA + i,dev->dev_addr[i] | (dev->dev_addr[i + 1] << 8));
printk (", addr:");
for (i = 0; i < ETH_ALEN; i += 2)
{
u16 mac = cs8900_read (dev,PP_IA + i);
printk ("%c%02X:%2X", (i==0)?' ':':', mac & 0xff, (mac >> 8));
}
printk ("/n");
return (0);
}
static int __init cs8900_init (void)
{
struct net_device *ndev;
ndev = alloc_etherdev(sizeof (cs8900_t));
if (!ndev) {
printk("%s: could not allocate device./n", "cs8900");
return -ENOMEM;
}
cs8900_dev = ndev;
cs8900_dev->init = cs8900_probe;
ether_setup (ndev);
ndev->open = cs8900_start;
ndev->stop = cs8900_stop;
ndev->hard_start_xmit = cs8900_send_start;
ndev->get_stats = cs8900_get_stats;
ndev->set_multicast_list = cs8900_set_receive_mode;
ndev->tx_timeout = cs8900_transmit_timeout;
ndev->watchdog_timeo = HZ;
return (register_netdev (cs8900_dev));
}
static void __exit cs8900_cleanup (void)
{
cs8900_t *priv = (cs8900_t *) cs8900_dev->ml_priv;
if( priv->char_devnum)
{
unregister_chrdev(priv->char_devnum,"cs8900_eeprom");
}
release_mem_region (cs8900_dev->base_addr,16);
unregister_netdev (cs8900_dev);
}
MODULE_AUTHOR ("Abraham van der Merwe <abraham at 2d3d.co.za>");
MODULE_DESCRIPTION (VERSION_STRING);
MODULE_LICENSE ("GPL");
module_init (cs8900_init);
module_exit (cs8900_cleanup);
//8900.h
#ifndef CS8900_H
#define CS8900_H
/*
* linux/drivers/net/cs8900.h
*
* Author: Abraham van der Merwe <abraham at 2d3d.co.za>
*
* A Cirrus Logic CS8900A driver for Linux
* based on the cs89x0 driver written by Russell Nelson,
* Donald Becker, and others.
*
* This source code is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*/
/*
* Ports
*/
#define PP_Address 0x0a /* PacketPage Pointer Port (Section 4.10.10) */
#define PP_Data 0x0c /* PacketPage Data Port (Section 4.10.10) */
/*
* Registers
*/
#define PP_ProductID 0x0000 /* Section 4.3.1 Product Identification Code */
#define PP_MemBase 0x002c /* Section 4.9.2 Memory Base Address Register */
#define PP_IntNum 0x0022 /* Section 3.2.3 Interrupt Number */
#define PP_EEPROMCommand 0x0040 /* Section 4.3.11 EEPROM Command */
#define PP_EEPROMData 0x0042 /* Section 4.3.12 EEPROM Data */
#define PP_RxCFG 0x0102 /* Section 4.4.6 Receiver Configuration */
#define PP_RxCTL 0x0104 /* Section 4.4.8 Receiver Control */
#define PP_TxCFG 0x0106 /* Section 4.4.9 Transmit Configuration */
#define PP_BufCFG 0x010a /* Section 4.4.12 Buffer Configuration */
#define PP_LineCTL 0x0112 /* Section 4.4.16 Line Control */
#define PP_SelfCTL 0x0114 /* Section 4.4.18 Self Control */
#define PP_BusCTL 0x0116 /* Section 4.4.20 Bus Control */
#define PP_TestCTL 0x0118 /* Section 4.4.22 Test Control */
#define PP_ISQ 0x0120 /* Section 4.4.5 Interrupt Status Queue */
#define PP_TxEvent 0x0128 /* Section 4.4.10 Transmitter Event */
#define PP_BufEvent 0x012c /* Section 4.4.13 Buffer Event */
#define PP_RxMISS 0x0130 /* Section 4.4.14 Receiver Miss Counter */
#define PP_TxCOL 0x0132 /* Section 4.4.15 Transmit Collision Counter */
#define PP_SelfST 0x0136 /* Section 4.4.19 Self Status */
#define PP_BusST 0x0138 /* Section 4.4.21 Bus Status */
#define PP_TxCMD 0x0144 /* Section 4.4.11 Transmit Command */
#define PP_TxLength 0x0146 /* Section 4.5.2 Transmit Length */
#define PP_IA 0x0158 /* Section 4.6.2 Individual Address (IEEE Address) */
#define PP_RxStatus 0x0400 /* Section 4.7.1 Receive Status */
#define PP_RxLength 0x0402 /* Section 4.7.1 Receive Length (in bytes) */
#define PP_RxFrame 0x0404 /* Section 4.7.2 Receive Frame Location */
#define PP_TxFrame 0x0a00 /* Section 4.7.2 Transmit Frame Location */
/*
* Values
*/
/* PP_IntNum */
#define INTRQ0 0x0000
#define INTRQ1 0x0001
#define INTRQ2 0x0002
#define INTRQ3 0x0003
/* PP_ProductID */
#define EISA_REG_CODE 0x630e
#define REVISION(x) (((x) & 0x1f00) >> 8)
#define VERSION(x) ((x) & ~0x1f00)
#define CS8900A 0x0000
#define REV_B 7
#define REV_C 8
#define REV_D 9
/* PP_RxCFG */
#define Skip_1 0x0040
#define StreamE 0x0080
#define RxOKiE 0x0100
#define RxDMAonly 0x0200
#define AutoRxDMAE 0x0400
#define BufferCRC 0x0800
#define CRCerroriE 0x1000
#define RuntiE 0x2000
#define ExtradataiE 0x4000
/* PP_RxCTL */
#define IAHashA 0x0040
#define PromiscuousA 0x0080
#define RxOKA 0x0100
#define MulticastA 0x0200
#define IndividualA 0x0400
#define BroadcastA 0x0800
#define CRCerrorA 0x1000
#define RuntA 0x2000
#define ExtradataA 0x4000
/* PP_TxCFG */
#define Loss_of_CRSiE 0x0040
#define SQErroriE 0x0080
#define TxOKiE 0x0100
#define Out_of_windowiE 0x0200
#define JabberiE 0x0400
#define AnycolliE 0x0800
#define T16colliE 0x8000
/* PP_BufCFG */
#define SWint_X 0x0040
#define RxDMAiE 0x0080
#define Rdy4TxiE 0x0100
#define TxUnderruniE 0x0200
#define RxMissiE 0x0400
#define Rx128iE 0x0800
#define TxColOvfiE 0x1000
#define MissOvfloiE 0x2000
#define RxDestiE 0x8000
/* PP_LineCTL */
#define SerRxON 0x0040
#define SerTxON 0x0080
#define AUIonly 0x0100
#define AutoAUI_10BT 0x0200
#define ModBackoffE 0x0800
#define PolarityDis 0x1000
#define L2_partDefDis 0x2000
#define LoRxSquelch 0x4000
/* PP_SelfCTL */
#define RESET 0x0040
#define SWSuspend 0x0100
#define HWSleepE 0x0200
#define HWStandbyE 0x0400
#define HC0E 0x1000
#define HC1E 0x2000
#define HCB0 0x4000
#define HCB1 0x8000
/* PP_BusCTL */
#define ResetRxDMA 0x0040
#define DMAextend 0x0100
#define UseSA 0x0200
#define MemoryE 0x0400
#define DMABurst 0x0800
#define IOCHRDYE 0x1000
#define RxDMAsize 0x2000
#define EnableRQ 0x8000
/* PP_TestCTL */
#define DisableLT 0x0080
#define ENDECloop 0x0200
#define AUIloop 0x0400
#define DisableBackoff 0x0800
#define FDX 0x4000
/* PP_ISQ */
#define RegNum(x) ((x) & 0x3f)
#define RegContent(x) ((x) & ~0x3d)
#define RxEvent 0x0004
#define TxEvent 0x0008
#define BufEvent 0x000c
#define RxMISS 0x0010
#define TxCOL 0x0012
/* PP_RxStatus */
#define IAHash 0x0040
#define Dribblebits 0x0080
#define RxOK 0x0100
#define Hashed 0x0200
#define IndividualAdr 0x0400
#define Broadcast 0x0800
#define CRCerror 0x1000
#define Runt 0x2000
#define Extradata 0x4000
#define HashTableIndex(x) ((x) >> 0xa)
/* PP_TxCMD */
#define After5 0
#define After381 1
#define After1021 2
#define AfterAll 3
#define TxStart(x) ((x) << 6)
#define Force 0x0100
#define Onecoll 0x0200
#define InhibitCRC 0x1000
#define TxPadDis 0x2000
/* PP_BusST */
#define TxBidErr 0x0080
#define Rdy4TxNOW 0x0100
/* PP_TxEvent */
#define Loss_of_CRS 0x0040
#define SQEerror 0x0080
#define TxOK 0x0100
#define Out_of_window 0x0200
#define Jabber 0x0400
#define T16coll 0x8000
#define TX_collisions(x) (((x) >> 0xb) & ~0x8000)
/* PP_BufEvent */
#define SWint 0x0040
#define RxDMAFrame 0x0080
#define Rdy4Tx 0x0100
#define TxUnderrun 0x0200
#define RxMiss 0x0400
#define Rx128 0x0800
#define RxDest 0x8000
/* PP_RxMISS */
#define MissCount(x) ((x) >> 6)
/* PP_TxCOL */
#define ColCount(x) ((x) >> 6)
/* PP_SelfST */
#define T3VActive 0x0040
#define INITD 0x0080
#define SIBUSY 0x0100
#define EEPROMpresent 0x0200
#define EEPROMOK 0x0400
#define ELpresent 0x0800
#define EEsize 0x1000
/* PP_EEPROMCommand */
#define EEWriteEnable 0x00F0
#define EEWriteDisable 0x0000
#define EEWriteRegister 0x0100
#define EEReadRegister 0x0200
#define EEEraseRegister 0x0300
#define ELSEL 0x0400
#endif /* #ifndef CS8900_H */