同步多线程(SMT)是一种在一个CPU 的时钟周期内能够执行来自多个线程的指令的硬件多线程技术。本质上,同步多线程是一种将线程级并行处理(多CPU)转化为指令级并行处理(同一CPU)的方法。
<span style="font-size:14px;">NAME ppc64_cpu - cpu settings utility SYNOPSIS ppc64_cpu [OPTION] DESCRIPTION This utility allows users to view and set the cpu SMT, DSCR and smt-snooze-delay settings. OPTIONS --smt Get current SMT state. --smt={on|off} Set SMT state. --cores-present Get the number of cores present. --cores-on Get the number of cores currently online. --cores-on=X Put exactly X cores online. --dscr [-p <pid>] Get current DSCR system setting or, optionally, for <pid>. --dscr=<val> [-p <pid>] Change DSCR system setting or, optionally, for <pid>. --smt-snooze-delay Get current smt-snooze-delay setting. --smt-snooze-delay=<val> Change smt-snooze-delay setting. --run-mode Get current diagnostics run mode. --run-mode=<val> Set current diagnostics run mode. --frequency [-t <time>] Determine cpu frequency for <time> seconds, default is 1 second. --subcores-per-core Get number of subcores per core. --subcores-per-core=X Set subcores per core to X (1 or 4). --threads-per-core Get number of threads per core. --info Display system state information.</span>
root@zhaippc64le:~# ppc64_cpu --smt SMT is off
此时用ppc64_cpu --info查看时,只有第一列带*号
root@zhaippc64le:~# ppc64_cpu --info Core 0: 0* 1 2 3 4 5 6 7 Core 1: 8* 9 10 11 12 13 14 15 Core 2: 16* 17 18 19 20 21 22 23 Core 3: 24* 25 26 27 28 29 30 31 Core 4: 32* 33 34 35 36 37 38 39 Core 5: 40 41 42 43 44 45 46 47 Core 6: 48* 49 50 51 52 53 54 55 Core 7: 56* 57 58 59 60 61 62 63 Core 8: 64* 65 66 67 68 69 70 71 Core 9: 72* 73 74 75 76 77 78 79
# ppc64_cpu --smt SMT is on用ppc64_cpu --info查看时,只有所有列带*号
# ppc64_cpu --info Core 0: 0* 1* 2* 3* 4* 5* 6* 7* Core 1: 8* 9* 10* 11* 12* 13* 14* 15* Core 2: 16* 17* 18* 19* 20* 21* 22* 23* Core 3: 24* 25* 26* 27* 28* 29* 30* 31* Core 4: 32* 33* 34* 35* 36* 37* 38* 39* Core 5: 40* 41* 42* 43* 44* 45* 46* 47* Core 6: 48* 49* 50* 51* 52* 53* 54* 55* Core 7: 56* 57* 58* 59* 60* 61* 62* 63* Core 8: 64* 65* 66* 67* 68* 69* 70* 71* Core 9: 72* 73* 74* 75* 76* 77* 78* 79*
# lscpu Architecture: ppc64le Byte Order: Little Endian CPU(s): 160 On-line CPU(s) list: 0-159 Thread(s) per core: 8 Core(s) per socket: 5 Socket(s): 2 NUMA node(s): 2 Model: 8284-22A CPU max MHz: 3690.0000 CPU min MHz: 2061.0000 L1d cache: 64K L1i cache: 32K L2 cache: 512K L3 cache: 8192K NUMA node0 CPU(s): 0-39 NUMA node1 CPU(s): 40-79
参考:
1 处理器CPU概念及CPU多线程:http://blog.csdn.net/zhaihaifei/article/details/51015528