GT2440--U-Boot分析(二)

Step3

U-Boot源码分析:

第一阶段: 

硬件设备初始化

为加载Bootloader第二阶段代码准备RAM空间

复制Bootloader第二阶段代码到RAM准备好空间中

设置栈

跳转到第二阶段的C代码;

第二阶段:

初始化本阶段使用到的硬件设备;

检测系统内存映射;

将内核映像和根文件系统映像从Flash上读到RAM中;

为内核设置启动参数;

调用内核;

第一阶段由:start.slowlevel_init.s两个汇编文件完成,下面进行分析:

Start.s主要执行代码:

#include <config.h>
#include <version.h>
.globl _start
_start:	b       reset
reset:
/*
 * set the cpu to SVC32 mode
 */
mrs	r0,cpsr
bic	r0,r0,#0x1f
orr	r0,r0,#0xd3
msr	cpsr,r0
#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
ldr     r0, =pWTCON
mov     r1, #0x0
str     r1, [r0]
/*
 * mask all IRQs by setting all bits in the INTMR - default
 */
mov	r1, #0xffffffff
ldr	r0, =INTMSK
str	r1, [r0]
# if defined(CONFIG_S3C2410)
ldr	r1, =0x3ff
ldr	r0, =INTSUBMSK
str	r1, [r0]
# endif
#endif	/* CONFIG_S3C2400 || CONFIG_S3C2410 */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl	cpu_init_crit
#endif
/* Set up the stack	     */
stack_setup:
ldr	r0, _TEXT_BASE	 /* upper 128 KiB: relocated uboot   */
sub	r0, r0, #CFG_MALLOC_LEN	/* malloc area                      */
sub	r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo                        */
#ifdef CONFIG_USE_IRQ
sub	r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub	sp, r0, #12	 /* leave 3 words for abort-stack    */
bl clock_init	 /*系统时钟配置C函数	 */
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate:	 /* relocate U-Boot to RAM	    */
adr	r0, _start	 /* r0 <- current position of code   */
ldr	r1, _TEXT_BASE	 /* test if we run from flash or RAM */
cmp     r0, r1                  /* don't reloc during debug         */
beq     clear_bss
ldr	r2, _armboot_start
ldr	r3, _bss_start
sub	r2, r3, r2	 /* r2 <- size of armboot            */
#if 1
bl  CopyCode2Ram	/* r0: source, r1: dest, r2: size 这是一个C函数 */
#endif
#endif	/* CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
ldr	r0, _bss_start	 /* find start of bss segment        */
ldr	r1, _bss_end	 /* stop here                        */
mov 	r2, #0x00000000	 /* clear                            */
clbss_l:str	r2, [r0]	 /* clear loop...                    */
add	r0, r0, #4
cmp	r0, r1
ble	clbss_l
/*	转入第二阶段C函数入口	 */
ldr	pc, _start_armboot
_start_armboot:	.word start_armboot
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
cpu_init_crit:
/*
 * flush v4 I/D caches
 */
mov	r0, #0
mcr	p15, 0, r0, c7, c7, 0	/* flush v3/v4 cache */
mcr	p15, 0, r0, c8, c7, 0	/* flush v4 TLB */
/*
 * disable MMU stuff and caches
 */
mrc	p15, 0, r0, c1, c0, 0
bic	r0, r0, #0x00002300	@ clear bits 13, 9:8 (--V- --RS)
bic	r0, r0, #0x00000087	@ clear bits 7, 2:0 (B--- -CAM)
orr	r0, r0, #0x00000002	@ set bit 2 (A) Align
orr	r0, r0, #0x00001000	@ set bit 12 (I) I-Cache
mcr	p15, 0, r0, c1, c0, 0
/*
 * before relocating, we have to setup RAM timing
 * because memory timing is board-dependend, you will
 * find a lowlevel_init.S in your board directory.
 */
mov	ip, lr
bl	lowlevel_init
mov	lr, ip
mov	pc, lr
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */

start.s中未使用到的代码裁去后可得上述较为简易的代码,大部分代码均加有注释阅读也较为容易。

start.s中通过bl  lowlevel_init调用lowlevel_init.s

lowlevel_init.s只要执行代码如下:

/*上面还有部分代码进行定义用于各个bank的设置用的用在此不列出*/
.globl lowlevel_init
lowlevel_init:
/* memory control configuration */
/* make r0 relative the current location so that it */
/* reads SMRDATA out of FLASH rather than memory ! */
ldr     r0, =SMRDATA
ldr	r1, _TEXT_BASE
sub	r0, r0, r1
ldr	r1, =BWSCON	/* Bus Width Status Controller */
add     r2, r0, #13*4
0:
ldr     r3, [r0], #4
str     r3, [r1], #4
cmp     r2, r0
bne     0b
/* everything is fine now */
mov	pc, lr
.ltorg
/* the literal pools origin */
SMRDATA:
    .word (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
    .word ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))
    .word ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))
    .word ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))
    .word ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))
    .word ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))
    .word ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))
    .word ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))
    .word ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))
#if CONFIG_133MHZ_SDRAM
    .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Tsrc<<18)+REFCNT)
    .word 0xB2
    .word 0xB0
    .word 0xB0
#else
    .word ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)
    .word 0x32
    .word 0x30
    .word 0x30
#endif

lowlevel_init.s主要功能为使能外接的SDRAM,代码也有较为详细的说明。

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