HDLbits----Verification Reading Simulations---Building circuit simulation
1.Sim/circuit1moduletop_module(inputa,inputb,outputq);//assignq=a&b;//Fixmeendmodule2.Sim/circuit2moduletop_module(inputa,inputb,inputc,inputd,outputq);//assignq=~(a^b^c^d);//Fixmeendmodule3.Sim/circu