S32K NVIC配置(以外部中断为例)

Nested Vectored Interrupt Controller (NVIC)

   

包含在Cortex-M4F 中,

优先级有16级

   

中断相关寄存器

ISER[0-3]:Interrupt Set Enable Register

ICER[0-3]:Interrupt Clear Enable Register

ISPR[0-3]:Interrupt Set Pending Register

ICPR[0-3]:Interrupt Clear Pending Register

IABR[0-3]:Interrupt Active bit Register

IP[0-122]:Interrupt Priority Register

STIR:Software Trigger Interrupt Register

   

   

以外部中断PORTC_IRQn 为例

查看S32K1xx_DMA_INT_mapping.xlsm

   

   

   

屏幕剪辑的捕获时间: 2019/8/4 6:59

   

第三列 NVIC Interrupt ID 表示中断号

第四列 ISER, ICER, ISPR, ICPR, and IABR 寄存器号,等于NVIC Interrupt ID 整除32

第五列 IPR寄存器号 *实际为每个寄存器存4个中断源优先级,程序已经分开定义成了0-122 直接IPR[NVIC interrupt ID]即可

   

初始化时在应用模块配置好后(如外部中断需要在PCR中配置IRQC),加下以下NVIC 配置

S32_NVIC->ICPR[PORTC_IRQn/32] = 1 << (PORTC_IRQn % 32); /* clr any pending IRQ*/

S32_NVIC->ISER[PORTC_IRQn/32] = 1 << (PORTC_IRQn % 32); /* enable IRQ */

S32_NVIC->IP[PORTC_IRQn] = 0xA0; /* priority 10 of 0-15*/

   

中断程序写对应用.s 里中断指向的程序

void PORTC_IRQHandler (void) {

PORTC->ISFR=0xFFFFFFFFu;/* Clear button IRQ flag */


}

   

完整程序:

#include "S32K144.h" /* include peripheral declarations S32K144 */

   

#define PTD0 0 /* Port PTD0, bit 0: FRDM EVB output to blue LED */

#define PTC12 12 /* Port PTC12, bit 12: FRDM EVB input from BTN0 [SW2] */

   

void PORTC_IRQHandler (void) {

PORTC->ISFR=0xFFFFFFFFu;

/* Perform read-after-write to ensure flag clears before ISR exit */

PTD->PTOR |= 1<<0; /* Toggle output on port D0 (blue LED) */

}

   

int main(void) {

/* Enable clocks to peripherals (PORT modules) */

PCC-> PCCn[PCC_PORTC_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT C */

PCC-> PCCn[PCC_PORTD_INDEX] = PCC_PCCn_CGC_MASK; /* Enable clock to PORT D */

/* Configure port C12 as GPIO input (BTN 0 [SW2] on EVB) */

PORTC->DFCR=1;                                //Digital Filter Clock=LPO

PORTC->DFWR=8;                                //Digital Filter width=8

PORTC->DFER=1<

   

PTC->PDDR &= ~(1<

PORTC->PCR[12] = 0x00090110; /* Port C12: MUX = GPIO, input filter enabledInterrupt on rising edge */

   

S32_NVIC->ICPR[PORTC_IRQn/32] = 1 << (PORTC_IRQn % 32); /* clr any pending IRQ*/

S32_NVIC->ISER[PORTC_IRQn/32] = 1 << (PORTC_IRQn % 32); /* enable IRQ */

S32_NVIC->IP[PORTC_IRQn] = 0xA0; /* priority 10 of 0-15*/

   

/* Configure port D0 as GPIO output (LED on EVB) */

PTD->PDDR |= 1<

PORTD->PCR[0] = 0x00000100; /* Port D0: MUX = GPIO */

   

for(;;) {

   

}

}

   

   

转载于:https://www.cnblogs.com/ningmeng-lizi/p/11312879.html

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