一.目标
在米尔科技的z-turn板上实现linux下的DMA驱动,同时对DMA中断进行测试。
二.分析
ZYNQ的AXIDMA有Direct Register Mode和Scatter/Gather Mode,本文使用的是Direct Register Mode。
Vivado上PL端的构造如下图所示,开启了DMA中断(PL-PS中断)。对于AXI-DMA来说,CPU通过S_AXI_LITE得出DMA地址,通过GP接口与S_AXI_相连,用于写数据,通过HP接口读入数据。
AXI_DMA_0的物理地址为:0x4040_0000。
对于DMA的操作可以查看手册相关寄存器如下图所示。
这里就不一一说明每个寄存器的功能了,详情请查看手册或查看:
https://www.cnblogs.com/yiwenbo/p/10500060.html
三.代码实现
①驱动代码
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
/**
*DMA驱动程序
*
*
*
*
*
*
*`
*
* **/
//DMA 基地址
#define DMA_BASE_ADDR 0X40400000
//DMA MM2S控制寄存器
volatile unsigned int * mm2s_cr;
#define MM2S_DMACR 0X00000000
//DMA MM2S状态控制寄存器
volatile unsigned int * mm2s_sr;
#define MM2S_DMASR 0X00000004
//DMA MM2S源地址低32位
volatile unsigned int * mm2s_sa;
#define MM2S_SA 0X00000018
//DMA MM2S传输长度(字节)
volatile unsigned int * mm2s_len;
#define MM2S_LENGTH 0X00000028
//DMA S2MM控制寄存器
volatile unsigned int * s2mm_cr;
#define S2MM_DMACR 0X00000030
//DMA S2MM状态控制寄存器
volatile unsigned int * s2mm_sr;
#define S2MM_DMASR 0X00000034
//DMA S2MM目标地址低32位
volatile unsigned int * s2mm_da;
#define S2MM_DA 0X00000048
//DMA S2MM传输长度(字节)
volatile unsigned int * s2mm_len;
#define S2MM_LENGTH 0X00000058
#define DMA_LENGTH 16384
dma_addr_t axidma_handle;
volatile unsigned int * axidma_addr;
//DMA interrupt functions
static irqreturn_t dma_mm2s_irq(int irq,void *dev_id)
{
printk("irq=%d\n",irq);
iowrite32(0x00001000,mm2s_sr);
return IRQ_HANDLED;
}
static irqreturn_t dma_s2mm_irq(int irq,void *dev_id)
{
printk("irq=%d\n",irq);
iowrite32(0x00001000,s2mm_sr);
return IRQ_HANDLED;
}
int major;
static struct class *dma_class = NULL;
static int dma_init(void);
static int dma_exit(void);
static int dma_open(struct inode *inode,struct file *file);
static int dma_write(struct file *file,const char __user *buf, size_t count,loff_t *ppos);
static int dma_read(struct file *file,char __user *buf,size_t size,loff_t *ppos);
/*
*file_operations 结构数据,沟通内核与操作系统桥梁
*
* */
static struct file_operations dma_lops=
{
.owner = THIS_MODULE,
.read = dma_read,
.open = dma_open,
.write = dma_write,
};
/*
* 初始化,用于module init
*
* */
static int dma_init(void)
{
major=register_chrdev(0,"dma_dev",&dma_lops);
dma_class = class_create(THIS_MODULE,"dma_dev");
device_create(dma_class,NULL,MKDEV(major,0),NULL,"dma_dev");
printk("major dev number= %d",major);
mm2s_cr = ioremap(DMA_BASE_ADDR+MM2S_DMACR, 4);
mm2s_sr = ioremap(DMA_BASE_ADDR+MM2S_DMASR, 4);
mm2s_sa = ioremap(DMA_BASE_ADDR+MM2S_SA, 4);
mm2s_len = ioremap(DMA_BASE_ADDR+MM2S_LENGTH,4);
s2mm_cr = ioremap(DMA_BASE_ADDR+S2MM_DMACR, 4);
s2mm_sr = ioremap(DMA_BASE_ADDR+S2MM_DMASR, 4);
s2mm_da = ioremap(DMA_BASE_ADDR+S2MM_DA, 4);
s2mm_len = ioremap(DMA_BASE_ADDR+S2MM_LENGTH,4);
return 0;
}
/*
*退出 用于 module exit
*
* */
static int dma_exit(void)
{
unregister_chrdev(major,"dma_dev");
device_destroy(dma_class,MKDEV(major,0));
class_destroy(dma_class);
free_irq(dma_mm2s_irq,NULL);
dma_free_coherent(NULL,DMA_LENGTH,axidma_addr,axidma_handle);
iounmap(mm2s_cr);
iounmap(mm2s_sr);
iounmap(mm2s_sa);
iounmap(mm2s_len);
iounmap(s2mm_cr);
iounmap(s2mm_sr);
iounmap(s2mm_da);
iounmap(s2mm_len);
return 0;
}
/*
*open 接口函数
*
* */
static int dma_open(struct inode *inode,struct file *file)
{
int err;
printk("DMA open\n");
//申请一大块空间
axidma_addr = dma_alloc_coherent(NULL,DMA_LENGTH,&axidma_handle,GFP_KERNEL);
//申请中断
err = request_irq(61,dma_mm2s_irq,IRQF_TRIGGER_RISING,"dma_dev",NULL);
printk("err=%d\n",err);
err = request_irq(62,dma_s2mm_irq,IRQF_TRIGGER_RISING,"dma_dev",NULL);
printk("err=%d\n",err);
return 0;
}
/*
* write 接口函数
*
* */
static int dma_write(struct file *file,const char __user *buf, size_t count,loff_t *ppos)
{
int err=0;
printk("dma write start !\n");
if(count>DMA_LENGTH)
{
printk("the number of data is too large!\n");
return 0;
}
memcpy(axidma_addr,buf,count);
iowrite32(0x00001001,mm2s_cr);//open int & enable DMA
iowrite32(axidma_handle,mm2s_sa);
iowrite32(count,mm2s_len);//write transmission length and DMA start transmission
printk("dma write is over!\n");
return 0;
}
/*
* read 接口函数
*
* */
static int dma_read(struct file *file,char __user *buf,size_t size,loff_t *ppos)
{
int err=0;
printk("dma read start!\n");
if(size>DMA_LENGTH)
{
printk("the number of data is not enough!\n");
return 0;
}
iowrite32(0x00001001,s2mm_cr);//open int & enable DMA
iowrite32(axidma_handle,s2mm_da);
iowrite32(size,s2mm_len);//write transmission length and DMA start transmission
memcpy(buf, axidma_addr, size);
printk("dma read is over!\n");
return 0;
}
module_init(dma_init);
module_exit(dma_exit);
MODULE_AUTHOR("TEST@dma");
MODULE_DESCRIPTION("dma driver");
MODULE_ALIAS("dma linux driver");
MODULE_LICENSE("GPL");
②测试代码
#include
#include
#include
#include
#include
void delay(void)
{
int i,j;
for(i=0;i<20000;i++)
for(j=0;j<10000;j++);
}
unsigned char array[101];
unsigned char readarray[101];
unsigned int test_ary[101];
unsigned int test_readary[101];
int main(int argc , char ** argv)
{
int fd;
int i;
int val=0;
fd = open("/dev/dma_dev",O_RDWR);
if(fd<0) {printf("can not open file\n");while(1);}
else printf("open file sucuss\n");
for(i=0;i<100;i++)
{
array[i]=i;
test_ary[i]=i;
}
while(1)
{
delay();
write(fd,array,100);
delay();delay();delay();
read(fd,readarray,100);
delay();delay();delay();
printf("------display readarray datas -------\n ");
for(i=0;i<100;i++)
{
printf("%d ",readarray[i]);
if((i+1)%20==0)printf(" \n");
}
printf("------------------------------\n");
for(i=0;i<100;i++)
{
if(array[i]==readarray[i])val++;
}
printf("val = %d \n",val);
printf("readarray[99]=%d\n",readarray[99]);
printf("-------initial data -------\n");
for(i=0;i<100;i++)
{
printf("%d ",test_ary[i]);
if((i+1)%20==0)printf("\n");
}
delay();
write(fd,test_ary,400);
delay();delay();delay();
read(fd,test_readary,400);
delay();delay();delay();
printf("-----display test_readary datas------\n ");
for(i=0;i<100;i++)
{
printf("%d ",test_readary[i]);
if((i+1)%20==0)printf(" \n");
}
printf("--------------------------------------\n");
for(i=0;i<100;i++)
{
array[i]=i*2;
}
val=0;
printf("==========================\n");
printf("==========================\n");
}
return 0;
}
③Makefile文件
KDIR = /home/python/Hard_disk_21G/04-Linux_Source/Kernel/linux-xlnx
PWD := $(shell pwd)
CC = $(CROSS_COMPILE)gcc
ARCH =arm
MAKE =make
obj-m:=dma_driver.o
modules:
$(MAKE) -C $(KDIR) ARCH=$(ARCH) CROSS_COMPLE=$(CROSS_COMPLE) M=$(PWD) modules
clean:
make -C $(KDIR) ARCH=$(ARCH) CROSS_COMPLE=$(CROSS_COMPLE) M=$(PWD) clean