本帖最后由 彩虹的微笑 于 2018-12-10 21:02 编辑
5.870621] [drm] Rockchip DRM driver version: v1.0.1
[ 5.875929] rockchip-drm display-subsystem: devfreq is not set
[ 5.882068] rockchip-vop ff940000.vop: invalid resource
[ 5.887298] rockchip-vop ff940000.vop: failed to get vop cabc lut registers
[ 5.894825] rockchip-drm display-subsystem: bound ff940000.vop (ops 0xc0b60e04)
[ 5.902199] rockchip-vop ff930000.vop: invalid resource
[ 5.907422] rockchip-vop ff930000.vop: failed to get vop cabc lut registers
[ 5.914850] rockchip-drm display-subsystem: bound ff930000.vop (ops 0xc0b60e04)
[ 5.922449] dwhdmi-rockchip ff980000.hdmi: registered DesignWare HDMI I2C bus driver
[ 5.930247] dwhdmi-rockchip ff980000.hdmi: Detected HDMI TX controller v2.00a with HDCP (DWC MHL PHY)
[ 5.940216] rockchip-drm display-subsystem: bound ff980000.hdmi (ops 0xc0b599a8)
[ 5.947608] rockchip-drm display-subsystem: failed to bind ff960000.dsi (ops 0xc0b59db0): -517
[ 5.956926] rockchip-drm display-subsystem: master bind failed: -517
[ 5.963849] mali ffa30000.gpu: Failed to get leakage
[ 5.968877] mali ffa30000.gpu: Failed to get pvtm
[ 5.973820] W : [File] : drivers/gpu/arm/midgard/platform/rk/mali_kbase_config_rk.c; [Line] : 113; [Func] : kbase_platform_rk_init(); power-off-delay-ms not available.
[ 5.989041] mali ffa30000.gpu: GPU identified as 0x0750 r0p0 status 1
[ 5.995610] mali ffa30000.gpu: Protected mode not available
[ 6.001390] mali ffa30000.gpu: Using configured power model mali-simple-power-model, and fallback mali-simple-power-model
[ 6.012447] I : [File] : drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c; [Line] : 399; [Func] : kbase_devfreq_init(); success initing power_model_simple.
[ 6.027265] devfreq ffa30000.gpu: Couldn't update frequency transition information.
[ 6.027347] mali ffa30000.gpu: Probed as mali0
[ 6.027800] dwmmc_rockchip ff0d0000.dwmmc: IDMAC supports 32-bit address mode.
[ 6.034950] dwmmc_rockchip ff0d0000.dwmmc: Using internal DMA controller.
[ 6.034957] dwmmc_rockchip ff0d0000.dwmmc: Version ID is 270a
[ 6.034972] dwmmc_rockchip ff0d0000.dwmmc: DW MMC controller at irq 30,32 bit host data width,256 deep fifo
[ 6.034983] dwmmc_rockchip ff0d0000.dwmmc: 'clock-freq-min-max' property was deprecated.
[ 6.035009] dwmmc_rockchip ff0d0000.dwmmc: No vmmc regulator found
[ 6.035012] dwmmc_rockchip ff0d0000.dwmmc: No vqmmc regulator found
[ 6.035165] dwmmc_rockchip ff0d0000.dwmmc: allocated mmc-pwrseq
[ 6.048624] mmc_host mmc2: Bus speed (slot 0) = 400000Hz (slot req 400000Hz, actual 400000HZ div = 0)
[ 6.068632] dwmmc_rockchip ff0d0000.dwmmc: 1 slots initialized
[ 6.068896] rockchip-dmc dmc: Get drm_device fail
[ 6.072695] [drm] Rockchip DRM driver version: v1.0.1
[ 6.072846] rockchip-drm display-subsystem: devfreq is not set
[ 6.073021] rockchip-vop ff940000.vop: invalid resource
[ 6.073025] rockchip-vop ff940000.vop: failed to get vop cabc lut registers
[ 6.073357] rockchip-drm display-subsystem: bound ff940000.vop (ops 0xc0b60e04)
[ 6.073382] rockchip-vop ff930000.vop: invalid resource
[ 6.073385] rockchip-vop ff930000.vop: failed to get vop cabc lut registers
[ 6.073725] rockchip-drm display-subsystem: bound ff930000.vop (ops 0xc0b60e04)
[ 6.073997] dwhdmi-rockchip ff980000.hdmi: registered DesignWare HDMI I2C bus driver
[ 6.074040] dwhdmi-rockchip ff980000.hdmi: Detected HDMI TX controller v2.00a with HDCP (DWC MHL PHY)
[ 6.074076] dwmmc_rockchip ff0d0000.dwmmc: card claims to support voltages below defined range
[ 6.074859] rockchip-drm display-subsystem: bound ff980000.hdmi (ops 0xc0b599a8)
[ 6.074907] rockchip-drm display-subsystem: bound ff960000.dsi (ops 0xc0b59db0)
[ 6.074911] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013).
[ 6.074912] [drm] No driver support for vblank timestamp query.
[ 6.074991] rockchip-drm display-subsystem: failed to parse display resources
[ 6.085392] mmc_host mmc2: Bus speed (slot 0) = 49500000Hz (slot req 50000000Hz, actual 49500000HZ div = 0)
[ 6.086016] mmc2: new high speed SDIO card at address 0001
[ 6.240211] rockchip-vop ff940000.vop: [drm:vop_crtc_enable] Update mode to 1280x800p63, type: 16
[ 6.240335] dw-mipi-dsi ff960000.dsi: final DSI-Link bandwidth: 1000 x 4 Mbps
[ 6.608916] Console: switching to colour frame buffer device 160x50
[ 6.666050] rockchip-drm display-subsystem: fb0: frame buffer device
[ 6.701295] rockchip-dmc dmc: Failed to get leakage
[ 6.706246] rockchip-dmc dmc: Failed to get pvtm
[ 6.711041] rockchip-dmc dmc: failed to get vop bandwidth to dmc rate
[ 6.717594] rockchip-dmc dmc: could not find power_model node
[ 6.735757] devfreq dmc: Couldn't update frequency transition information.
[ 6.744342] input: gpio-keys as /devices/platform/gpio-keys/input/input1
[ 6.751889] rk808-rtc rk808-rtc: setting system clock to 2013-01-18 08:50:15 UTC (1358499015)