感觉有意思的旅鼠问题---HDLbits---Circuits---Sequential Logic---Finite State Machines第二部分

1.Lemmings1

module top_module(
    input clk,
    input areset,    // Freshly brainwashed Lemmings walk left.
    input bump_left,
    input bump_right,
    output walk_left,
    output walk_right); //  
    reg state , next_state;
parameter  left=0,right=1;
    always@(posedge clk or posedge areset) begin
        if(areset)
            state<=left;
        else
            state<=next_state;
    end
    always@(*) begin
        case(state)
            left:begin
                if(bump_left)
                    next_state<=right;
                else
                    next_state<=left;
            end
            right:begin
                if(bump_right)
                    next_state<=left;
                else
                    next_state<=right;
            end
        endcase
    end
    assign walk_left=(state==left);
    assign walk_right=(state==right);
  
endmodule

2.lemmings2

module top_module(
    input clk,
    input areset,    // Freshly brainwashed Lemmings walk left.
    input bump_left,
    input bump_right,
    input ground,
    output walk_left,
    output walk_right,
    output aaah ); 
    reg[1:0] state, next_state;
    parameter left=2'b0,right=2'b1,ground_left=2'b10,ground_right=2'b11;
    always@(posedge clk or posedge areset) begin
        if(areset)
            state<=left;
        else
            state<=next_state;
    end
    always@(*) begin
        case(state) 
            left:begin
                if(ground==0)
                next_state<=ground_left;
               else
                    if(bump_left)
                    next_state<=right;
                    else 
                        next_state<=left;
                  end
            right:begin
                if(ground==0)
                next_state<=ground_right;
               else
                   if(bump_right)
                    next_state<=left;
                    else 
                        next_state<=right;
                  end
            ground_left:begin
                if(ground==0)
                next_state<=ground_left;
               else
                    next_state<=left;
            end
            ground_right:begin
                if(ground==0)
                next_state<=ground_right;
               else
                    next_state<=right;
            end
        endcase
    end
    assign walk_left=(state==left);
    assign walk_right=(state==right);
    assign aaah=((state==ground_left)||(state==ground_right));
              
            
                    
endmodule

3.Lemmings3

module top_module(
    input clk,
    input areset,    
    input bump_left,
    input bump_right,
    input ground,
    input dig,
    output walk_left,
    output walk_right,
    output aaah,
    output digging ); 
    parameter LEFT=3'b000,RIGHT=3'b001,DIG_L=3'b010,DIG_R=3'b011,FALL_L=3'b100,FALL_R=3'b101;
    reg [2:0] state,next_state;
    always @(*)
        begin
            case(state)
                LEFT:begin
                    if(!ground)
                        next_state = FALL_L;
                    else if(dig)
                        next_state = DIG_L;
                    else if(bump_left)
                        next_state = RIGHT;
                    else
                        next_state = LEFT;
                end
                RIGHT:begin
                    if(!ground)
                        next_state = FALL_R;
                    else if(dig)
                        next_state = DIG_R;
                    else if(bump_right)
                        next_state = LEFT;
                    else
                        next_state = RIGHT;
                end
                DIG_L:begin
                    if(!ground)
                        next_state = FALL_L;
                    else
                        next_state = DIG_L;
                end
                DIG_R:begin
                    if(!ground)
                        next_state = FALL_R;
                    else
                        next_state = DIG_R;
                end
                FALL_L:begin
                    if(!ground)
                        next_state = FALL_L;
                    else
                        next_state = LEFT;
                end
                FALL_R:begin
                    if(!ground)
                        next_state = FALL_R;
                    else
                        next_state = RIGHT;
                end
            endcase
        end
    always @(posedge clk,posedge areset)
        begin
            if(areset)
                state <= LEFT;
            else
                state <= next_state;
        end
    assign walk_left = (state == LEFT);
    assign walk_right = (state == RIGHT);
    assign aaah = ((state == FALL_L)||(state == FALL_R));
    assign digging = ((state == DIG_L)||(state == DIG_R));
endmodule

4.Lemmings4

module top_module(
    input clk,
    input areset,    // Freshly brainwashed Lemmings walk left.
    input bump_left,
    input bump_right,
    input ground,
    input dig,
    output walk_left,
    output walk_right,
    output aaah,
    output digging ); 
    reg[2:0] state,next_state;
    wire[4:0] count;
    parameter left=0,
    right=1,
    dig_left=2,
    dig_right=3,
    fall_left=4,
    fall_right=5,
   dying=6,
    die=7;
    always@(posedge clk or posedge areset) begin
        if(areset)
            state<=left;
        else
            state<=next_state;
    end
    
     always@(posedge clk or posedge areset) begin
        if(areset)
            count<=1;
         else if((next_state==fall_left)||(next_state==fall_right))
            count<=count+1;
        else
            count<=1;
    end
    
    always@(*) begin
        case(state)
            left: 
                begin
                if(ground==0)
                    next_state<=fall_left;
                else 
                    if(dig)
                        next_state<=dig_left;
                     else
                         if(bump_left)
                             next_state<=right;
                          else
                              next_state<=left;
            end
            right: 
                begin
                if(ground==0)
                    next_state<=fall_right;
                else 
                    if(dig)
                        next_state<=dig_right;
                     else
                         if(bump_right)
                             next_state<=left;
                          else
                              next_state<=right;
            end
            dig_left:
                begin
                    if(ground==0)
                        next_state<=fall_left;
                    else
                        next_state<=dig_left;
                end
            dig_right:
                begin
                    if(ground==0)
                        next_state<=fall_right;
                    else
                        next_state<=dig_right;
                end
            fall_left:
                begin
                   if((!ground)&&(count<=5'd20))
                        next_state = fall_left;
                    else if((!ground)&&(count>5'd20))
                        next_state = dying;
                    else
                        next_state = left;
                end
            fall_right:
                begin
                   if((!ground)&&(count<=5'd20))
                        next_state = fall_right;
                    else if((!ground)&&(count>5'd20))
                        next_state = dying;
                    else
                        next_state = right;
                end
            dying:
                begin
                    if(ground==0)
                        next_state<=dying;
                    else
                        next_state<=die;
                end
            die:
                begin
                    next_state<=die;
                end
        endcase
    end  
   
    assign walk_left=(state==left);
    assign walk_right=(state==right);
    assign digging=((state==dig_left)||(state==dig_right));
    assign aaah=((state==fall_left)||(state==fall_right)||(state==dying));
                
endmodule

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