#include
int f(int a, int b, int c)
{
printf("%d %d %d\n", a, b, c); // 1 2 3
a = 7;
b = 8;
c = 9;
printf("%d %d %d\n", a, b, c); // 7 8 9
return 0;
}
int main()
{
int a = 1, b = 2, c = 3;
printf("%d %d %d\n", a, b, c); // 1 2 3
f(a, b, c);
printf("%d %d %d\n", a, b, c); // 1 2 3
return 0;
}
#if 0
/*
* intel
*/
0000000000001149 :
1149: f3 0f 1e fa endbr64
114d: 55 push %rbp
114e: 48 89 e5 mov %rsp,%rbp
1151: 48 83 ec 10 sub $0x10,%rsp
1155: 89 7d fc mov %edi,-0x4(%rbp)
1158: 89 75 f8 mov %esi,-0x8(%rbp)
115b: 89 55 f4 mov %edx,-0xc(%rbp)
115e: 8b 4d f4 mov -0xc(%rbp),%ecx
1161: 8b 55 f8 mov -0x8(%rbp),%edx
1164: 8b 45 fc mov -0x4(%rbp),%eax
1167: 89 c6 mov %eax,%esi
1169: 48 8d 3d 94 0e 00 00 lea 0xe94(%rip),%rdi # 2004 <_IO_stdin_used+0x4>
1170: b8 00 00 00 00 mov $0x0,%eax
1175: e8 d6 fe ff ff callq 1050
117a: c7 45 fc 07 00 00 00 movl $0x7,-0x4(%rbp)
1181: c7 45 f8 08 00 00 00 movl $0x8,-0x8(%rbp)
1188: c7 45 f4 09 00 00 00 movl $0x9,-0xc(%rbp)
118f: 8b 4d f4 mov -0xc(%rbp),%ecx
1192: 8b 55 f8 mov -0x8(%rbp),%edx
1195: 8b 45 fc mov -0x4(%rbp),%eax
1198: 89 c6 mov %eax,%esi
119a: 48 8d 3d 63 0e 00 00 lea 0xe63(%rip),%rdi # 2004 <_IO_stdin_used+0x4>
11a1: b8 00 00 00 00 mov $0x0,%eax
11a6: e8 a5 fe ff ff callq 1050
11ab: b8 00 00 00 00 mov $0x0,%eax
11b0: c9 leaveq
11b1: c3 retq
00000000000011b2 :
11b2: f3 0f 1e fa endbr64
11b6: 55 push %rbp
11b7: 48 89 e5 mov %rsp,%rbp
11ba: 48 83 ec 10 sub $0x10,%rsp
11be: c7 45 f4 01 00 00 00 movl $0x1,-0xc(%rbp)
11c5: c7 45 f8 02 00 00 00 movl $0x2,-0x8(%rbp)
11cc: c7 45 fc 03 00 00 00 movl $0x3,-0x4(%rbp)
11d3: 8b 4d fc mov -0x4(%rbp),%ecx
11d6: 8b 55 f8 mov -0x8(%rbp),%edx
11d9: 8b 45 f4 mov -0xc(%rbp),%eax
11dc: 89 c6 mov %eax,%esi
11de: 48 8d 3d 1f 0e 00 00 lea 0xe1f(%rip),%rdi # 2004 <_IO_stdin_used+0x4>
11e5: b8 00 00 00 00 mov $0x0,%eax
11ea: e8 61 fe ff ff callq 1050
11ef: 8b 55 fc mov -0x4(%rbp),%edx
11f2: 8b 4d f8 mov -0x8(%rbp),%ecx
11f5: 8b 45 f4 mov -0xc(%rbp),%eax
11f8: 89 ce mov %ecx,%esi
11fa: 89 c7 mov %eax,%edi
11fc: e8 48 ff ff ff callq 1149
1201: 8b 4d fc mov -0x4(%rbp),%ecx
1204: 8b 55 f8 mov -0x8(%rbp),%edx
1207: 8b 45 f4 mov -0xc(%rbp),%eax
120a: 89 c6 mov %eax,%esi
120c: 48 8d 3d f1 0d 00 00 lea 0xdf1(%rip),%rdi # 2004 <_IO_stdin_used+0x4>
1213: b8 00 00 00 00 mov $0x0,%eax
1218: e8 33 fe ff ff callq 1050
121d: b8 00 00 00 00 mov $0x0,%eax
1222: c9 leaveq
1223: c3 retq
1224: 66 2e 0f 1f 84 00 00 nopw %cs:0x0(%rax,%rax,1)
122b: 00 00 00
122e: 66 90 xchg %ax,%ax
/*
* arm
*/
000000000040055c :
40055c: a9be7bfd stp x29, x30, [sp, #-32]!
400560: 910003fd mov x29, sp
400564: b9001fa0 str w0, [x29, #28]
400568: b9001ba1 str w1, [x29, #24]
40056c: b90017a2 str w2, [x29, #20]
400570: 90000000 adrp x0, 400000 <_init-0x3e8>
400574: 911b8000 add x0, x0, #0x6e0
400578: b94017a3 ldr w3, [x29, #20]
40057c: b9401ba2 ldr w2, [x29, #24]
400580: b9401fa1 ldr w1, [x29, #28]
400584: 97ffffb3 bl 400450
400588: 528000e0 mov w0, #0x7 // #7
40058c: b9001fa0 str w0, [x29, #28]
400590: 52800100 mov w0, #0x8 // #8
400594: b9001ba0 str w0, [x29, #24]
400598: 52800120 mov w0, #0x9 // #9
40059c: b90017a0 str w0, [x29, #20]
4005a0: 90000000 adrp x0, 400000 <_init-0x3e8>
4005a4: 911b8000 add x0, x0, #0x6e0
4005a8: b94017a3 ldr w3, [x29, #20]
4005ac: b9401ba2 ldr w2, [x29, #24]
4005b0: b9401fa1 ldr w1, [x29, #28]
4005b4: 97ffffa7 bl 400450
4005b8: 52800000 mov w0, #0x0 // #0
4005bc: a8c27bfd ldp x29, x30, [sp], #32
4005c0: d65f03c0 ret
00000000004005c4 :
4005c4: a9be7bfd stp x29, x30, [sp, #-32]!
4005c8: 910003fd mov x29, sp
4005cc: 52800020 mov w0, #0x1 // #1
4005d0: b9001fa0 str w0, [x29, #28]
4005d4: 52800040 mov w0, #0x2 // #2
4005d8: b9001ba0 str w0, [x29, #24]
4005dc: 52800060 mov w0, #0x3 // #3
4005e0: b90017a0 str w0, [x29, #20]
4005e4: 90000000 adrp x0, 400000 <_init-0x3e8>
4005e8: 911b8000 add x0, x0, #0x6e0
4005ec: b94017a3 ldr w3, [x29, #20]
4005f0: b9401ba2 ldr w2, [x29, #24]
4005f4: b9401fa1 ldr w1, [x29, #28]
4005f8: 97ffff96 bl 400450
4005fc: b94017a2 ldr w2, [x29, #20]
400600: b9401ba1 ldr w1, [x29, #24]
400604: b9401fa0 ldr w0, [x29, #28]
400608: 97ffffd5 bl 40055c
40060c: 90000000 adrp x0, 400000 <_init-0x3e8>
400610: 911b8000 add x0, x0, #0x6e0
400614: b94017a3 ldr w3, [x29, #20]
400618: b9401ba2 ldr w2, [x29, #24]
40061c: b9401fa1 ldr w1, [x29, #28]
400620: 97ffff8c bl 400450
400624: 52800000 mov w0, #0x0 // #0
400628: a8c27bfd ldp x29, x30, [sp], #32
40062c: d65f03c0 ret
#endif
