EZ430 chronos 套件源码集合I（3个WDT，3个杂项，2个写FLASH，2个LCD）
EZ430 chronos 套件源码集合I（3个WDT，3个杂项，2个写FLASH，2个LCD）
WDT 3
cc430x613x_wdt_01.c WDT, Toggle P1.0, Interval Overflow ISR, DCO SMCLK
cc430x613x_wdt_02.c WDT, Toggle P1.0, Interval Overflow ISR, 32kHz ACLK
cc430x613x_wdt_04.c WDT+ Failsafe Clock, WDT mode, DCO SMCLK
//******************************************************************************
// CC430F613x Demo - WDT, Toggle P1.0, Interval Overflow ISR, DCO SMCLK
//
// Description: Toggle P1.0 using software timed by the WDT ISR. Toggle rate
// is approximately 30ms = {(default DCO 1.045MHz) / 32768} based on default
// DCO/SMCLK clock source used in this example for the WDT.
// ACLK = n/a, MCLK = SMCLK = default DCO ~1.045MHz
//
// CC430F6137
// -----------------
// /|\| |
// | | |
// --|RST |
// | |
// | P1.0|-->LED
//
// M Morales
// Texas Instruments Inc.
// April 2009
// Built with CCE Version: 3.2.2 and IAR Embedded Workbench Version: 4.11B
//******************************************************************************
#include "cc430x613x.h"
void main(void)
{
WDTCTL = WDT_MDLY_32; // WDT 32ms, SMCLK, interval timer
SFRIE1 |= WDTIE; // Enable WDT interrupt
P1DIR |= 0x01; // Set P1.0 to output direction
__bis_SR_register(LPM0_bits + GIE); // Enter LPM0, enable interrupts
__no_operation(); // For debugger
}
// Watchdog Timer interrupt service routine
#pragma vector=WDT_VECTOR
__interrupt void WDT_ISR(void)
{
P1OUT ^= 0x01; // Toggle P1.0 (LED)
}
//******************************************************************************
// CC430F613x Demo - WDT, Toggle P1.0, Interval Overflow ISR, 32kHz ACLK
//
// Description: Toggle P1.0 using software timed by WDT ISR. Toggle rate is
// exactly 250ms based on 32kHz ACLK WDT clock source. In this example the
// WDT is configured to divide 32768 watch-crystal(2^15) by 2^13 with an ISR
// triggered @ 4Hz = [WDT CLK source/32768].
// ACLK = REFO , MCLK = SMCLK = default DCO ~1.045MHz
//
//
// CC430F6137
// -----------------
// /|\| |
// | | |
// --|RST |
// | |
// | P1.0|-->LED
//
// M Morales
// Texas Instruments Inc.
// April 2009
// Built with CCE Version: 3.2.2 and IAR Embedded Workbench Version: 4.11B
//******************************************************************************
#include "cc430x613x.h"
void main(void)
{
WDTCTL = WDT_ADLY_250; // WDT 250ms, ACLK, interval timer
SFRIE1 |= WDTIE; // Enable WDT interrupt
P1DIR |= 0x01; // Set P1.0 to output direction
__bis_SR_register(LPM3_bits + GIE); // Enter LPM3, enable interrupts
__no_operation(); // For debugger
}
// Watchdog Timer interrupt service routine
#pragma vector = WDT_VECTOR
__interrupt void WDT_ISR(void)
{
P1OUT ^= 0x01; // Toggle P1.0 using exclusive-OR
}
//******************************************************************************
// CC430F613x Demo - WDT+ Failsafe Clock, WDT mode, DCO SMCLK
//
// Description; Allow WDT+ in watchdog mode to timeout. Toggle P1.0 in main
// function. LPM4 is entered, this example will demonstrate WDT+ feature
// of preventing WDT+ clock to be disabled.
// The WDT+ will not allow active WDT+ clock to be disabled by software, the
// LED continues to Flash because the WDT times out normally (in 32768 DCOCLK
// cycles) even though software has attempted to disable WDT+ clock source.
// ACLK = n/a, MCLK = SMCLK = default DCO ~1.045MHz
//
// CC430F6137
// -----------------
// /|\| |
// | | |
// --|RST |
// | |
// | P1.0|-->LED
//
// M Morales
// Texas Instruments Inc.
// April 2009
// Built with CCE Version: 3.2.2 and IAR Embedded Workbench Version: 4.11B
//******************************************************************************
#include "cc430x613x.h"
void main(void)
{
P1DIR |= 0x01; // Set P1.0 to output - SET BREAKPOINT HERE
P1OUT ^= 0x01; // Toggle P1.0
__bis_SR_register(LPM4_bits + GIE); // Enter LPM4, Stop all clocks
__no_operation(); // For debugger
}
MISC 3
cc430x613x_core_01.c Reset on Invalid Address fetch, Toggle P1.0
cc430x613x_LPM3_1.c Enters LPM3 (ACLK = LFXT1)
cc430x613x_LPM3_2.c Enters LPM3 (ACLK = VLO)
//******************************************************************************
// CC430F613x Demo - Reset on Invalid Address fetch, Toggle P1.0
//
// Description: This program demonstrates how a reset is executed if the CPU
// tries to fetch instructions from within the module register memory address
// range (0x0100 --0x0FEF) or from within unused address ranges. Toggle P1.0
// by xor'ing P1.0 inside of a software loop that ends with TAR loaded with
// 3FFFh - op-code for "jmp $". This simulates a code error. The CC430F6137
// will force a reset because it will not allow a fetch from within the address
// range of the peripheral memory, as is seen by return to the mainloop and
// LED flash.
// ACLK = n/a, MCLK = SMCLK = default DCO ~1.045MHz
//
// CC430F6137
// -----------------
// /|\| |
// | | |
// --|RST |
// | |
// | P1.0|-->LED
//
// M Morales
// Texas Instruments Inc.
// April 2009
// Built with CCE Version: 3.2.2 and IAR Embedded Workbench Version: 4.11B
//******************************************************************************
#include "cc430x613x.h"
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer - SET BREAKPOINT HERE
P1DIR |= 0x01; // Set P1.0 to output direction
TA0R = 0x3FFF; // Valid opcode (for "jmp $")
while(1)
{
P1OUT ^= 0x01; // Toggle P1.0 using exclusive-OR
__delay_cycles(50000); // Delay loop
// C code to directly call an address location
((void (*)())0x350)(); // Invalid fetch ("call #0350h")
/* 0x350 is address of TA0R register and is within the module register memory
address range (0x0100 --0x0FEF) */
}
}
//******************************************************************************
// CC430x613x Demo - Enters LPM3 (ACLK = LFXT1)
//
// Description: Configure ACLK = LFXT1 and enters LPM3. Measure current.
// Note: SVS(H,L) & SVM(H,L) are disabled
// ACLK = LFXT1 = 32kHz, MCLK = SMCLK = default DCO
//
// CC430x613x
// -----------------
// /|\ | XIN|-
// | | | 32kHz
// ---|RST XOUT|-
// | |
//
// M. Morales
// Texas Instruments Inc.
// April 2009
// Built with CCE Version: 3.2.2 and IAR Embedded Workbench Version: 4.11B
//******************************************************************************
#include "cc430x613x.h"
void main(void)
{
WDTCTL = WDTPW+WDTHOLD; // Stop WDT
P5SEL |= BIT0 + BIT1; // Select XT1
UCSCTL6 |= XCAP_3; // Internal load cap
// Loop until XT1,XT2 & DCO stabilizes
do
{
UCSCTL7 &= ~(XT1LFOFFG + DCOFFG);
// Clear LFXT1,DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear fault flags
}while (SFRIFG1 & OFIFG); // Test oscillator fault flag
UCSCTL6 &= ~(XT1DRIVE_3); // Xtal is now stable, reduce drive
// strength
P1OUT = 0x00; P2OUT = 0x00; P3OUT = 0x00; P4OUT = 0x00; P5OUT = 0x00;
P1DIR = 0xFF; P2DIR = 0xFF; P3DIR = 0xFF; P4DIR = 0xFF; P5DIR = 0xFC;
PJOUT = 0x00;
PJDIR = 0xFF;
// Turn off SVSH, SVSM
PMMCTL0_H = 0xA5;
SVSMHCTL = 0;
SVSMLCTL = 0;
PMMCTL0_H = 0x00;
__bis_SR_register(LPM3_bits); // Enter LPM3
__no_operation(); // For debugger
}
//******************************************************************************
// CC430x613x Demo - Enters LPM3 (ACLK = VLO)
//
// Description: Enters LPM3 with ACLK = VLO
// SVS(H,L) & SVM(H,L) are also disabled
// ACLK = MCLK = SMCLK = VLO = 12kHz
//
// CC430x613x
// -----------------
// /|\| |
// | | |
// --|RST |
// | |
//
// M. Morales
// Texas Instruments Inc.
// April 2009
// Built with CCE Version: 3.2.2 and IAR Embedded Workbench Version: 4.11B
//******************************************************************************
#include "cc430x613x.h"
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Hold WDT
UCSCTL4 = SELM__DCOCLKDIV + SELS__DCOCLKDIV + SELA__VLOCLK;
// UCSCTL4 = SELM_1 + SELS_1 + SELA_1; // MCLK = SMCLK = ACLK = VLO
P1OUT = 0x00; P2OUT = 0x00; P3OUT = 0x00; P4OUT = 0x00; P5OUT = 0x00;
P1DIR = 0xFF; P2DIR = 0xFF; P3DIR = 0xFF; P4DIR = 0xFF; P5DIR = 0xFF;
PJOUT = 0x00;
PJDIR = 0xFF;
// Turn off SVSH, SVSM
PMMCTL0_H = 0xA5;
SVSMHCTL = 0;
SVSMLCTL = 0;
PMMCTL0_H = 0x00;
__bis_SR_register(LPM3_bits); // Enter LPM3
__no_operation();
}
Flash 2
cc430x613x_flashwrite_01.c Single-Byte Flash In-System Programming, Copy SegC to SegD
cc430x613x_flashwrite_02.c Flash In-System Programming w/ Long-Word write at 0x1800
//******************************************************************************
// CC430x613x Demo - Single-Byte Flash In-System Programming, Copy SegC to SegD
//
// Description: This program first erases flash seg C, then it increments all
// values in seg C, then it erases seg D, then copies seg C to seg D. Starting
// addresses of segments defined in this code: Seg C-0x1880, Seg D-0x1800.
// RESET the device to re-execute code. This is implemented to prevent
// stressing of Flash unintentionally.
// ACLK = REFO = 32kHz, MCLK = SMCLK = default DCO 1048576Hz
//
// CC430x613x
// -----------------
// /|\| XIN|-
// | | |
// --|RST XOUT|-
// | |
//
// M. Morales
// Texas Instruments Inc.
// April 2009
// Built with CCE v3.1 Build 3.2.3.6.4 and IAR Embedded Workbench v4.11B
//******************************************************************************
#include "cc430x613x.h"
char value; // 8-bit value to write to seg C
// Function prototypes
void write_SegC(char value);
void copy_C2D(void);
void main(void)
{
WDTCTL = WDTPW+WDTHOLD; // Stop WDT
value = 0; // initialize value
write_SegC(value); // Write segment C, increment value
copy_C2D(); // Copy segment C to D
while(1); // Loop forever, SET BREAKPOINT HERE
}
//------------------------------------------------------------------------------
// Input = value, holds value to write to Seg C
//------------------------------------------------------------------------------
void write_SegC(char value)
{
unsigned int i;
char * Flash_ptr; // Initialize Flash pointer
Flash_ptr = (char *) 0x1880;
__disable_interrupt(); // 5xx Workaround: Disable global
// interrupt while erasing. Re-Enable
// GIE if needed
FCTL3 = FWKEY; // Clear Lock bit
FCTL1 = FWKEY+ERASE; // Set Erase bit
*Flash_ptr = 0; // Dummy write to erase Flash seg
FCTL1 = FWKEY+WRT; // Set WRT bit for write operation
for (i = 0; i < 128; i++)
{
*Flash_ptr++ = value++; // Write value to flash
}
FCTL1 = FWKEY; // Clear WRT bit
FCTL3 = FWKEY+LOCK; // Set LOCK bit
}
//------------------------------------------------------------------------------
// Copy Seg C to Seg D
//------------------------------------------------------------------------------
void copy_C2D(void)
{
unsigned int i;
char *Flash_ptrC;
char *Flash_ptrD;
Flash_ptrC = (char *) 0x1880; // Initialize Flash segment C ptr
Flash_ptrD = (char *) 0x1800; // Initialize Flash segment D ptr
__disable_interrupt(); // 5xx Workaround: Disable global
// interrupt while erasing. Re-Enable
// GIE if needed
FCTL3 = FWKEY; // Clear Lock bit
FCTL1 = FWKEY+ERASE; // Set Erase bit
*Flash_ptrD = 0; // Dummy write to erase Flash seg D
FCTL1 = FWKEY+WRT; // Set WRT bit for write operation
for (i = 0; i < 128; i++)
{
*Flash_ptrD++ = *Flash_ptrC++; // copy value segment C to seg D
}
FCTL1 = FWKEY; // Clear WRT bit
FCTL3 = FWKEY+LOCK; // Set LOCK bit
}
//******************************************************************************
// CC430x613x Demo - Flash In-System Programming w/ Long-Word write at 0x1800
//
// Description: This program first erases flash seg D, then it writes a 32-bit
// value to memory location 0x1800 using long-word write mode. Long-word write
// provides faster write than byte/word mode.
// RESET the device to re-execute code. This is implemented to prevent
// stressing of Flash unintentionally.
// ACLK = REFO = 32kHz, MCLK = SMCLK = default DCO 1048576Hz
//
// CC430x613x
// -----------------
// /|\| XIN|-
// | | |
// --|RST XOUT|-
// | |
//
//
// M. Morales
// Texas Instruments Inc.
// April 2009
// Built with CCE v3.1 Build 3.2.3.6.4 and IAR Embedded Workbench v4.11B
//******************************************************************************
#include "cc430x613x.h"
void main(void)
{
unsigned long * Flash_ptrD; // Initialize Flash pointer Seg D
unsigned long value;
WDTCTL = WDTPW+WDTHOLD; // Stop WDT
Flash_ptrD = (unsigned long *) 0x1800; // Initialize Flash pointer
value = 0x12345678; // Initialize Value
__disable_interrupt(); // Flash31 Workaround: Disable global
// interrupt while erasing. Re-Enable
// GIE if needed
FCTL3 = FWKEY; // Clear Lock bit
FCTL1 = FWKEY+ERASE; // Set Erase bit
*Flash_ptrD = 0; // Dummy write to erase Flash seg
FCTL1 = FWKEY+BLKWRT; // Enable long-word write
*Flash_ptrD = value; // Write to Flash
FCTL1 = FWKEY; // Clear WRT bit
FCTL3 = FWKEY+LOCK; // Set LOCK bit
while(1); // Loop forever, SET BREAKPOINT HERE
}
LCD 2
//******************************************************************************
// CC430x613x Demo - LCD display a single character
//
// Description: Cycle through several characters in a single position on the
// LCDBA from Softbaugh. Put "0123456" on SBLCDA4 LCD.
// ACLK = REF0 = 32Khz, MCLK = SMCLK = DCO = Default
//
// MSP430x631x
// -----------------
// /|\| |
// | | |
// --|RST |
// | | SBLCDA4
// | S4 | -----------------
// | - |--> | + 5 4 3 2 1 0 |
// | S5 | -----------------
// | COM0|-----||||
// | COM1|------|||
// | COM2|-------||
// | COM3|--------|
// | |
//
//
// Texas Instruments Inc.
// Built with CCE Version: 3.2.2.1.4
//******************************************************************************
#include "cc430x613x.h"
// LCD Segments
#define LCD_A BIT0
#define LCD_B BIT1
#define LCD_C BIT2
#define LCD_D BIT3
#define LCD_E BIT6
#define LCD_F BIT4
#define LCD_G BIT5
#define LCD_H BIT7
// LCD Segment Mapping
const unsigned char LCD_Char_Map[] =
{
LCD_A+LCD_B+LCD_C+LCD_D+LCD_E+LCD_F, // '0' or 'O'
LCD_B+LCD_C, // '1' or 'I'
LCD_A+LCD_B+LCD_D+LCD_E+LCD_G, // '2' or 'Z'
LCD_A+LCD_B+LCD_C+LCD_D+LCD_G, // '3'
LCD_B+LCD_C+LCD_F+LCD_G, // '4' or 'y'
LCD_A+LCD_C+LCD_D+LCD_F+LCD_G, // '5' or 'S'
LCD_A+LCD_C+LCD_D+LCD_E+LCD_F+LCD_G, // '6' or 'b'
LCD_A+LCD_B+LCD_C, // '7'
LCD_A+LCD_B+LCD_C+LCD_D+LCD_E+LCD_F+LCD_G, // '8' or 'B'
LCD_A+LCD_B+LCD_C+LCD_D+LCD_F+LCD_G, // '9' or 'g'
};
void main(void)
{ volatile unsigned char i;
P5SEL |= (BIT5 | BIT6 | BIT7);
P5DIR |= (BIT5 | BIT6 | BIT7);
//*******************************************************************************
// Configure LCD_B
//LCD_FREQ = ACLK/32/4, LCD Mux 4, turn on LCD
LCDBCTL0 = (LCDDIV0 + LCDDIV1 + LCDDIV2 + LCDDIV3 + LCDDIV4)| LCDPRE0 | LCD4MUX | LCDON | LCDSON;
LCDBVCTL = LCDCPEN | VLCD_3_44;
//LCDBCTL0 |= LCDON + LCDSON;
REFCTL0 &= ~REFMSTR;
//Charge pump generated internally at 3.44V, external bias (V2-V4) generation
//Internal reference for charge pump
LCDBPCTL0 = 0x0030; //Select LCD Segments 4-5
LCDBPCTL1 = 0x0000; //
while(1)
{
for(i=6;i>0;i--)
{
LCDM3 &= ~LCD_Char_Map[8]; // Clear LCD
LCDM3 |= LCD_Char_Map[i-1]; // Display Character
__delay_cycles(500000);
}
}
}
//******************************************************************************
// CC430x613x Demo - LCD blinks between two different strings
//
// Description: The LCD blinks on a WDT interrupt, showing two different
// character strings on the LCD.
// ACLK = REF0 = 32Khz, MCLK = SMCLK = DCO = Default
//
// MSP430x631x
// -----------------
// /|\| |
// | | |
// --|RST |
// | | SBLCDA4
// | S0 | -----------------
// | - |--> | + 7 6 5 4 3 2 1 |
// | S9 | -----------------
// | COM0|-----||||
// | COM1|------|||
// | COM2|-------||
// | COM3|--------|
// | |
//
//
// Texas Instruments Inc.
// Built with CCE Version: 3.2.2.1.4
//******************************************************************************
#include "cc430x613x.h"
// LCD Segments
#define LCD_A BIT0
#define LCD_B BIT1
#define LCD_C BIT2
#define LCD_D BIT3
#define LCD_E BIT6
#define LCD_F BIT4
#define LCD_G BIT5
#define LCD_H BIT7
// LCD Segment Mapping
const unsigned char LCD_Char_Map[] =
{
LCD_A+LCD_B+LCD_C+LCD_D+LCD_E+LCD_F, // '0' or 'O'
LCD_B+LCD_C, // '1' or 'I'
LCD_A+LCD_B+LCD_D+LCD_E+LCD_G, // '2' or 'Z'
LCD_A+LCD_B+LCD_C+LCD_D+LCD_G, // '3'
LCD_B+LCD_C+LCD_F+LCD_G, // '4' or 'y'
LCD_A+LCD_C+LCD_D+LCD_F+LCD_G, // '5' or 'S'
LCD_A+LCD_C+LCD_D+LCD_E+LCD_F+LCD_G, // '6' or 'b'
LCD_A+LCD_B+LCD_C, // '7'
LCD_A+LCD_B+LCD_C+LCD_D+LCD_E+LCD_F+LCD_G, // '8' or 'B'
LCD_A+LCD_B+LCD_C+LCD_D+LCD_F+LCD_G, // '9' or 'g'
LCD_A+LCD_B+LCD_C+LCD_E+LCD_F+LCD_G, // 'A' 10
LCD_A+LCD_D+LCD_E+LCD_F, // 'C' 11
LCD_B+LCD_C+LCD_D+LCD_E+LCD_G, // 'd' 12
LCD_A+LCD_D+LCD_E+LCD_F+LCD_G, // 'E' 13
LCD_A+LCD_E+LCD_F+LCD_G, // 'F' 14
LCD_B+LCD_C+LCD_E+LCD_F+LCD_G, // 'H' 15
LCD_B+LCD_C+LCD_D+LCD_E, // 'J' 16
LCD_D+LCD_E+LCD_F, // 'L' 17
LCD_A+LCD_B+LCD_E+LCD_F+LCD_G, // 'P' 18
LCD_B+LCD_C+LCD_D+LCD_E+LCD_F // 'U' 19
};
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
P5SEL |= (BIT5 | BIT6 | BIT7);
P5DIR |= (BIT5 | BIT6 | BIT7);
//**************************************************************************
// Configure LCD_B
//LCD_FREQ = ACLK/32/2, LCD Mux 4, turn on LCD
//LCB_BLK_FREQ = ACLK/512
LCDBCTL0 = (LCDDIV0 + LCDDIV1 + LCDDIV2 + LCDDIV3 + LCDDIV4)| LCDPRE0 | LCD4MUX | LCDON | LCDSON;
LCDBVCTL = LCDCPEN | VLCD_3_44;
REFCTL0 &= ~REFMSTR;
//Charge pump generated internally at 3.44V, external bias (V2-V4) generation
//Internal reference for charge pump
LCDBPCTL0 = 0x03FF; //Select LCD Segments 0-9
LCDBPCTL1 = 0x0000; //
//LCD Memory
LCDM5 |= LCD_Char_Map[15]; //H
LCDM4 |= LCD_Char_Map[13]; //E
LCDM3 |= LCD_Char_Map[17]; //L
LCDM2 |= LCD_Char_Map[17]; //L
LCDM1 |= LCD_Char_Map[0]; //0
// Blink Memory
LCDBM5 |= LCD_Char_Map[11]; //C
LCDBM4 |= LCD_Char_Map[11]; //C
LCDBM3 |= LCD_Char_Map[4]; //4
LCDBM2 |= LCD_Char_Map[3]; //3
LCDBM1 |= LCD_Char_Map[0]; //0
/****************************************************************/
/* Setup WDT */
WDTCTL = WDT_ADLY_1000; // WDT 250ms, ACLK, interval timer
SFRIE1 |= WDTIE; // Enable WDT interrupt
/****************************************************************/
__bis_SR_register(LPM0_bits + GIE); // Enter LPM3 w/interrupt
}
// Watchdog Timer interrupt service routine
#pragma vector = WDT_VECTOR
__interrupt void watchdog_timer(void)
{
LCDBMEMCTL ^= LCDDISP;
}