makefile

Notes on GNU Makefile 

VPATH=src

VPATH指定寻找源代码的路径，如果多个文件夹含有同名文件，总是选择找到的第一个。

path %.c src

vpath %.h include

# set LD_LIBRARY_PATH
export CC  = gcc
export CXX = g++
export NVCC =nvcc
export CFLAGS =-pg -lrt -lmatio -ggdb -O0 -W  -msse3 -Wno-unknown-pragmas -funroll-loops   -I../../ 
#-lrt  for timing 
#-O3
#Wall 
ifeq ($(blas),1)
    LDFLAGS=  -lm -lcudart -lcublas -lcurand 
    CFLAGS+= -lopenblas -DMSHADOW_USE_MKL=0 -DMSHADOW_USE_CBLAS=1
else
    LDFLAGS=  -lm -lcudart -lcublas -lcurand  -lmkl_core -lmkl_intel_lp64 -lmkl_intel_thread -liomp5 -lpthread 
endif

LDFLAGS=  -lm -lcudart -lcublas -lcurand 
CFLAGS+= -lopenblas -DMSHADOW_USE_MKL=0 -DMSHADOW_USE_CBLAS=1

#export NVCCFLAGS =   -O0   -ccbin $(CXX)
export NVCCFLAGS = -O3 --use_fast_math -ccbin $(CXX)

# specify tensor path
BIN = 
OBJ = 
CUOBJ = astart.o nnet.o convnet.o
CUBIN =    astart  nnet convnet
.PHONY: clean all
#nnet convnet

all:  $(OBJ) $(BIN)  $(CUBIN)   $(CUOBJ)

astart.o:astart.cu aux.hpp aux-inl.h data.hpp
nnet.o: nnet.cu
convnet.o: convnet.cu

nnet: nnet.o
convnet: convnet.o
astart : astart.o  

$(BIN) :
    $(CXX) $(CFLAGS) -o $@ $(filter %.cpp %.o %.c, $^) $(LDFLAGS) 

$(OBJ) :
    $(CXX) -c $(CFLAGS) -o $@ $(firstword $(filter %.cpp %.c, $^) )

$(CUOBJ) :
    $(NVCC) -c $(filter %.cu, $^) -o $@   $(NVCCFLAGS) -Xcompiler "$(CFLAGS)"     

$(CUBIN) :
    $(NVCC) -o $@ $(NVCCFLAGS)   -Xcompiler   "$(CFLAGS)"   -Xlinker "$(LDFLAGS)"  $^

clean:
    $(RM) $(OBJ) $(BIN) $(CUBIN) $(CUOBJ) *~



Raw, no object

# set LD_LIBRARY_PATH
export CC  = gcc
export CXX = g++
export NVCC =nvcc
export CFLAGS = -Wall -O3 -msse3 -Wno-unknown-pragmas -funroll-loops -I../../


ifeq ($(blas),1)
    LDFLAGS= -lcblas -lm -lcudart -lcublas -lcurand 
    CFLAGS+= -DMSHADOW_USE_MKL=0 -DMSHADOW_USE_CBLAS=1
else
    LDFLAGS=  -lm -lcudart -lcublas -lcurand  -lmkl_core -lmkl_intel_lp64 -lmkl_intel_thread -liomp5 -lpthread 
endif
export NVCCFLAGS = -O3 --use_fast_math -ccbin $(CXX)

# specify tensor path
BIN =
OBJ =
CUOBJ =
CUBIN = nnet convnet
.PHONY: clean all

all: $(BIN) $(OBJ) $(CUBIN) $(CUOBJ)

nnet: nnet.cu
convnet: convnet.cu

$(BIN) :
    $(CXX) $(CFLAGS) -o $@ $(filter %.cpp %.o %.c, $^) $(LDFLAGS) 

$(OBJ) :
    $(CXX) -c $(CFLAGS) -o $@ $(firstword $(filter %.cpp %.c, $^) )

$(CUOBJ) :
    $(NVCC) -c -o $@ $(NVCCFLAGS) -Xcompiler "$(CFLAGS)" $(filter %.cu, $^)

$(CUBIN) :
    $(NVCC) -o $@ $(NVCCFLAGS) -Xcompiler "$(CFLAGS)" -Xlinker "$(LDFLAGS)" $(filter %.cu %.cpp %.o, $^)

clean:
    $(RM) $(OBJ) $(BIN) $(CUBIN) $(CUOBJ) *~

View Code

 

Smaller

#all: leveldb
#
#leveldb: leveldb.c++  
#    g++ leveldb.c++  -ggdb -O0  -o leveldb  -lleveldb -lpthread  -lsnappy 
#clean:
#    rm *.o leveldb
#    
###########################################
#Makefile for simple programs
###########################################
INC= 
LIB= -lpthread -lleveldb -lpthread  -lsnappy 

CC=g++
CC_FLAG=-Wall -O0 -ggdb3 
#-std=c++1y

PRG=leveldb
 

#$(OBJ):t.cxx
#    $(CC) $(CC_FLAG) $(INC) -c $*.c++ -o $*.o

.PRONY:clean all
all:
    $(CC) $(CC_FLAG)  $(PRG).c++  $(INC) $(LIB)  -o $(PRG)
    
clean:
    @echo "Removing linked and compiled files......"
    rm -f $(OBJ) $(PRG)

 

some functions

SRC=$(shell find -name "*.c")
Target=$(subst .c, ,$(SRC))
#Target=${SRC: .c=.o }

all:$(Target)


#$(Target):$(SRC)
#    @echo $(SRC)
#    @echo $(Target)
#    g++ $^ -o $@ -I /usr/include/python2.7 -lpython2.7 
%:%.c
g++ $^ -o $@ -I /usr/include/python2.7 -lpython2.7

 

 

http://blog.csdn.net/yuan_ming/article/details/4996342

$@    ／／列出目标文件，如果是归档文件，只列出归档文件名
The file name of the target of the rule . If the target is an archive member, then `$@ ' is the name of the archive file. In a pattern rule that has multiple targets (see Introduction to Pattern Rules ), `$@ ' is the name of whichever target caused the rule's commands to be run.

$%    ／／当目标文件是一个归档文件的时候，列出归档文件的成员文件名。否则为空。
The target member name, when the target is an archive member. See Archives . For example, if the target is foo.a(bar.o) then `$% ' is bar.o and `$@ ' is foo.a . `$% ' is empty when the target is not an archive member.

$<    ／／列出第一个依赖文件
The name of the first prerequisite . If the target got its commands from an implicit rule, this will be the first prerequisite added by the implicit rule (see Implicit Rules ).

＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝＝以上三个都是列出一个文件，下面的一般可能会列出多个文件＝＝＝＝＝＝＝＝＝＝

$?    ／／列出所有更新的文件 
The names of all the prerequisites that are newer than the target, with spaces between them. For prerequisites which are archive members, only the member named is used (see Archives ). 
$^    ／／列出所有的依赖文件，重复文件只列出一次
The names of all the prerequisites , with spaces between them. For prerequisites which are archive members, only the member named is used (see Archives ). A target has only one prerequisite on each other file it depends on, no matter how many times each file is listed as a prerequisite. So if you list a prerequisite more than once for a target, the value of $^ contains just one copy of the name. This list does not contain any of the order-only prerequisites; for those see the `$| ' variable, below. 
$+    ／／列出所有依赖文件，重复文件按顺序列出
T hi s is like `$^ ', but prerequisites listed more than once are duplicated in the order they were listed in the makefile. This is primarily useful for use in linking commands where it is meaningful to repeat library file names in a particular order.

$|   ／／列出所有order-Only文件名。 
T he n ames of all the order-only prerequisites, with spaces between them.

$*The stem with which an implicit rule matches (see How Patterns Match ). If the target is dir/a.foo.b and the target pattern is a.%.b then the stem is dir/foo . The stem is useful for constructing names of related files. In a static pattern rule, the stem is part of the file name that matched the `% ' in the target pattern.

In an explicit rule, there is no stem; so `$* ' cannot be determined in that way. Instead, if the target name ends with a recognized suffix (see Old-Fashioned Suffix Rules ), `$* ' is set to the target name minus the suffix. For example, if the target name is `foo.c ', then `$* ' is set to `foo ', since `.c ' is a suffix. GNUmake does this bizarre thing only for compatibility with other implementations of make . You should generally avoid using `$* ' except in implicit rules or static pattern rules.

If the target name in an explicit rule does not end with a recognized suffix, `$* ' is set to the empty string for that rule.