Makefile的call函数

http://blog.csdn.net/codesinger/article/details/9316251

写了个例子来研究Makefile的call函数：

 #define a multiline variable
 define target
     echo $@
     echo $@
 endef

 #define the target which is the first target, so default target
 all:
     $(call target,all)

 #define the second target, we must explicitly make it
 clean:
     $(call target,clean)

 #declare that all and clean are phony targets
 .PHONY: all clean

执行make或make all的结果是：

 echo all
 all
 echo all
 all

执行make clean的结果是：

 echo clean
 clean
 echo clean
 clean

其实源代码可以这么写的：

 #define a multiline variable
 define target
     echo $@
     echo $@
 endef

 #define the target which is the first target, so default target
 all:
     $(call target)

 #define the second target, we must explicitly make it
 clean:
     $(call target)

 #declare that all and clean are phony targets
 .PHONY: all clean

结果跟上面一样。

小结：Makefile中的第一个目标是最终目标，是make默认执行的目标，call函数会以此调用多行变量的每一个（此处是make命令，所以会被执行了）。然后$@自动化变量在make执行是会被赋值为当前的目标。