解决Modelsim仿真DDR IP core时报vlog-2902错误

    在使用Modelsim 10.1C以上版本进行DDR IP core仿真时会报如下错误：

    Error: (vlog-2902) ddr2_model_parameters_c3.vh(214): A `define was found on the same line as a SystemVerilog `ifdef, `ifndef, `elsif, or `else

    之前三水兄在博客中给出解决办法，实测并不能解决这个问题。

    首先看一下Xilinx官方给出的答复：

    Modelsim 10.1c release note sates as :
Product Changes in 10.1c
Release 10.1b introduced a new error, number 2902. By default in the 10.1x series of releases this should have been a warning. In future releases this will become a suppressible error. If you use Modelsim 10.1c, you can complete compling although the following warning appeasr: ** Warning: (vlog-2902) ddr2_model_parameters_c3.vh(214): A `define was found on the same line as a SystemVerilog `ifdef, `ifndef, `elsif, or `else.
A workaround for this error is to tell the simulator that the error message can be ignored with the command:
"-suppress 2902"

    其实看完之后还是不知道"-suppress 2902"到底应该放哪，是不是这样感觉？

    废话不多说，直接给出解决方法吧。上图：

    只需要把99行改为vlog -incr -suppress 2902+incdir+. +define+x4Gb +define+sg107E +define+x16 ddr3_model.v