常用系统函数

PL端

$clog2 = clogb2

        系统函数 $clog2 应返回参数以 2 为底的对数的上限（对数四舍五入为整数值）。参数可以是整数或任意大小的向量值。参数应被视为无符号值，参数值为 0 将产生结果 0。
        该系统函数可用于计算对给定大小的存储器进行寻址所需的最小地址宽度或表示给定数量的状态所需的最小向量宽度。

$readmemb 和 $readmemh

        两个系统任务（$readmemb 和 $readmemh）从指定的文本文件读取数据并将其加载到指定的内存中。任一任务都可以在仿真期间随时执行。

        要读取的文本文件应仅包含以下内容：

        — 空白（空格、换行符、制表符和换页符）

        — 注释（允许使用两种类型的注释）

        — 二进制或十六进制数字 数字既没有长度也没有基数指定格式。

        对于 $readmemb，每个数字应为二进制。对于 $readmemh，数字应为十六进制。未知值（x 或 X）、高阻抗值（z 或 Z）和下划线 (_) 可用于指定 Verilog HDL 源描述中的数字。应使用空格和/或注释来分隔数字。

PS端：

Xil_SetTlbAttributes(0xFFFF0000,0x14de2);

禁用Cache（针对所选的地址）

Axi Lite读写RAM

使用Axi Lite接口访问寄存器列表作为缓冲区-CSDN博客

void Axi_ReadRamA(u8 *Data_addr_point, u32 Read_ByteLong){
    int i;
    u32 Read_Data_Origin;
    for ( i = 0; i < Read_ByteLong; i++)
    {
        Read_Data_Origin = AXI_REG_LIST_mReadReg(Axi_RamA_BaseAddr, i*4);
        *(Data_addr_point + i) = (u8) Read_Data_Origin;
    }
}
void Axi_WriteRamB(u8 *Data_addr_point, u32 Write_ByteLong){
    int i;
    for ( i = 0; i < Write_ByteLong; i++)
    {
        AXI_REG_LIST_mWriteReg(Axi_RamB_BaseAddr,i*4 ,*(Data_addr_point  + i));
    }
}

GPIO配置

int GPIO_init_TEST(void)
{
    int Status;
    GPIO_Device_ConFig = XGpioPs_LookupConfig(GPIO_DEVICE_ID);
    if (GPIO_Device_ConFig == NULL) {
		return XST_FAILURE;
	}
    Status = XGpioPs_CfgInitialize(&GPIO_Decive,
                                    GPIO_Device_ConFig,
                                    GPIO_Device_ConFig->BaseAddr);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}
    //LED0
    XGpioPs_SetDirectionPin(&GPIO_Decive,
                            LED0,
                            0x01);
    XGpioPs_SetOutputEnablePin(&GPIO_Decive,
                            LED0,
                            0x01);
    //LED1
    XGpioPs_SetDirectionPin(&GPIO_Decive,
                            LED1,
                            0x01);
    XGpioPs_SetOutputEnablePin(&GPIO_Decive,
                            LED1,
                            0x01);
    //Bottom
    XGpioPs_SetDirectionPin(&GPIO_Decive,
                            Bottom,
                            0x0);
    XGpioPs_SetOutputEnablePin(&GPIO_Decive,
                            Bottom,
                            0x01);
    //init
    XGpioPs_WritePin(&GPIO_Decive, LED0, 0x00);
    XGpioPs_WritePin(&GPIO_Decive, LED1, 0x00);
}

GPIO中断配置

void GIC_GPIO_INIT(){
    int Status;

    Xil_ExceptionInit();
    Interrupt_Gpio_ConFig = XScuGic_LookupConfig(INTC_DEVICE_ID); 
	if (NULL == Interrupt_Gpio_ConFig) {
		return XST_FAILURE;
	}

	Status = XScuGic_CfgInitialize(&Interrupt_Gpio_instance, 
                                    Interrupt_Gpio_ConFig,
                                    Interrupt_Gpio_ConFig->CpuBaseAddress);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}
    Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
                                (Xil_ExceptionHandler) XScuGic_InterruptHandler,
                                &Interrupt_Gpio_instance);     

    Status = XScuGic_Connect(&Interrupt_Gpio_instance,
                    Interrupt_ID_Gpio,
                    (Xil_InterruptHandler )XGpioPs_IntrHandler,
                    (void *)&GPIO_Decive
                    );   
    if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	} 
    // XGpioPs_SetIntrType(&GPIO_Decive,
    //                     GPIO_BANK_2,
    //                     0xffffffff,
    //                     0x00,
    //                     0x00) ;   
    XGpioPs_SetIntrTypePin(&GPIO_Decive,Bottom,XGPIOPS_IRQ_TYPE_EDGE_FALLING);
    XGpioPs_SetCallbackHandler(&GPIO_Decive,
                              (void *) &GPIO_Decive,
                              (XGpioPs_Handler )IntrHandler);      
    // XGpioPs_IntrEnable(&GPIO_Decive,
    // GPIO_BANK_2,
    // (1<<(Bottom-54))
    // ); 
    XGpioPs_IntrEnablePin(&GPIO_Decive,Bottom);
    XScuGic_Enable(&Interrupt_Gpio_instance,
                    Interrupt_ID_Gpio);
    Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ);
    return XST_SUCCESS;
}

中断设置流程

int GIC_SGI_init(){
    int Status;

    Xil_ExceptionInit();
    GIC_SGI_ConFig = XScuGic_LookupConfig(GIC_DECIVE_ID_INT);
	if (NULL == GIC_SGI_ConFig) {
		return XST_FAILURE;
	}

	Status = XScuGic_CfgInitialize(&GIC_SGI_instance_point,
                                    GIC_SGI_ConFig,
                                    GIC_SGI_ConFig->CpuBaseAddress);
	if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}
    Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
                                (Xil_ExceptionHandler) XScuGic_InterruptHandler,
                                &GIC_SGI_instance_point);
    //SGI
    Status = XScuGic_Connect(&GIC_SGI_instance_point,
                    Interrupt_ID_SGI_14,
                    (Xil_InterruptHandler )SGI_IntrHandler,
                    (void *)&GIC_SGI_instance_point
                    );
    if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}
    XScuGic_Enable(&GIC_SGI_instance_point,
                    Interrupt_ID_SGI_14);
    //HGI
    Status = XScuGic_Connect(&GIC_SGI_instance_point,
                    Interrupt_ID_Hardware_0,
                    (Xil_InterruptHandler )Hardware_IntrHandler,
                    (void *)&GIC_SGI_instance_point
                    );
    if (Status != XST_SUCCESS) {
		return XST_FAILURE;
	}
    // XScuGic_SetPriorityTriggerType();
    XScuGic_SetPriTrigTypeByDistAddr(DistBaseAddress,
                                     Interrupt_ID_Hardware_0,
                                     0x20,
                                     0x03);
    XScuGic_InterruptMaptoCpu(&GIC_SGI_instance_point,
                                CPU_id_0,
								Interrupt_ID_Hardware_0);
    XScuGic_Enable(&GIC_SGI_instance_point,
                    Interrupt_ID_Hardware_0);
    Xil_ExceptionEnableMask(XIL_EXCEPTION_IRQ);
    return XST_SUCCESS;
}