u-boot-1.3.4移植到mini2440+128M nand boot(2)
|
第
3
阶段
支持
nand boot
程序修改
1
、修改
/cpu/arm920t/start.S
1) 删除 AT91RM9200 使用的 LED 代码。 #include <config.h> #include <version.h> #if defined(CONFIG_AT91RM9200DK) #include <status_led.h> /* 这是针对 AT91RM9200DK 开发板的。 */ #endif ...... /* * the actual start code */ start_code: /* * set the cpu to SVC32 mode */ mrs r0,cpsr bic r0,r0,#0x1f orr r0,r0,#0xd3 msr cpsr,r0 #if defined(CONFIG_AT91RM9200DK) bl coloured_LED_init bl red_LED_on #endif
2)
修改寄存器地址定义
#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)|| defined(CONFIG_S3C2440) /* turn off the watchdog */
#if defined(CONFIG_S3C2400)
#define pWTCON 0x15300000 #define INTMSK 0x14400008 /* Interupt-Controller base addresses */ #define CLKDIVN 0x14800014 /* clock divisor register */ #else #define pWTCON 0x53000000 #define INTMSK 0x4A000008 /* Interupt-Controller base addresses */ #define INTSUBMSK 0x4A00001C #define CLKDIVN 0x4C000014 /* clock divisor register */ #endif #define CLK_CTL_BASE 0x4C000000 #define MDIV_405 0x7f << 12 #define PSDIV_405 0x21 #define MDIV_200 0xa1 << 12 #define PSDIV_200 0x31
3)
修改中断禁止部分
#if defined(CONFIG_S3C2410) ldr r1, =0x7ff /* 根据 2410 芯片手册， INTSUBMSK 有 11 位可用 */ ldr r0, =INTSUBMSK str r1, [r0] #endif #if defined(CONFIG_S3C2440) ldr r1, =0x7fff /* 根据 2440 芯片手册， INTSUBMSK 有 15 位可用 */ ldr r0, =INTSUBMSK str r1, [r0] #endif
4)
修改时钟设置（
2440
的主频为
405MHz
。）
# if defined(CONFIG_S3C2440) /* FCLK:HCLK:PCLK = 1:4:8 */ ldr r0, =CLKDIVN mov r1, #5 str r1, [r0] mrc p15, 0, r1, c1, c0, 0 /*read ctrl register */ orr r1, r1, #0xc0000000 /*Asynchronous */ mcr p15, 0, r1, c1, c0, 0 /*write ctrl register */
/*now, CPU clock is 405.00 Mhz */
mov r1, #CLK_CTL_BASE /* */ mov r2, #MDIV_405 /* mpll_405mhz */ add r2, r2, #PSDIV_405 /* mpll_405mhz */ str r2, [r1, #0x04] /* MPLLCON */
#else
/* FCLK:HCLK:PCLK = 1:2:4 */ ldr r0, =CLKDIVN mov r1, #3 str r1, [r0]
mrc p15, 0, r1, c1, c0, 0 /*read ctrl register */
orr r1, r1, #0xc0000000 /*Asynchronous */ mcr p15, 0, r1, c1, c0, 0 /*write ctrl register */
/*now, CPU clock is 202.8 Mhz */
mov r1, #CLK_CTL_BASE /* */ mov r2, #MDIV_200 /* mpll_200mhz */ add r2, r2, #PSDIV_200 /* mpll_200mhz */ str r2, [r1, #0x04]
# endif
#endif /* CONFIG_S3C2400 || CONFIG_S3C2410|| CONFIG_S3C2440 */
5)
将从
Nor Flash
启动改成从
NAND Flash
启动。
在以下 U － Boot 的重定向语句段 ( 作用是将 u-boot 的源代码从 nor flash 到 sdram 中 ) ： （你完全可以把下面的 nor flash 重定向语句全部干掉） #ifndef CONFIG_AT91RM9200
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ cmp r0, r1 /* don't reloc during debug */ beq stack_setup
ldr r2, _armboot_start
ldr r3, _bss_start sub r2, r3, r2 /* r2 <- size of armboot */ add r2, r0, r2 /* r2 <- source end address*/
copy_loop:
ldmia {r3-r10} /* copy from source address [r0] */ stmia {r3-r10} /* copy to target address [r1] */ cmp r0, r2 /* until source end addreee [r2] */ ble copy_loop #endif /* CONFIG_SKIP_RELOCATE_UBOOT */ #endif
的前面添加上以下的
nand boot
代码：
#ifdef CONFIG_S3C2440_NAND_BOOT
#define NAND_CTL_BASE 0x4E000000
/* Offset */ #define oNFCONF 0x00 #define oNFCONT 0x04 #define oNFCMD 0x08 #define oNFSTAT 0x20 #define LENGTH_UBOOT 0x40000
@ reset NAND
mov r1, #NAND_CTL_BASE ldr r2, =( (7<<12)|(7<<8)|(7<<4)|(0<<0) ) str r2, [r1, #oNFCONF] ldr r2, [r1, #oNFCONF] ldr r2, =( (1<<4)|(0<<1)|(1<<0) ) @ Active low CE Control str r2, [r1, #oNFCONT] ldr r2, [r1, #oNFCONT] ldr r2, =(0x6) @ RnB Clear str r2, [r1, #oNFSTAT] ldr r2, [r1, #oNFSTAT] mov r2, #0xff @ RESET command strb r2, [r1, #oNFCMD] mov r3, #0 @ wait nand1: add r3, r3, #0x1 cmp r3, #0xa blt nand1
nand2:
ldr r2, [r1, #oNFSTAT] @ wait ready tst r2, #0x4 beq nand2 ldr r2, [r1, #oNFCONT] orr r2, r2, #0x2 @ Flash Memory Chip Disable str r2, [r1, #oNFCONT] @ get read to call C functions (for nand_read()) ldr sp, DW_STACK_START @ setup stack pointer mov fp, #0 @ no previous frame, so fp=0 @ copy U-Boot to RAM ldr r0, =TEXT_BASE mov r1, #0x0 mov r2, #LENGTH_UBOOT bl nand_read_ll tst r0, #0x0 beq ok_nand_read
bad_nand_read:
loop2: b loop2 @ infinite loop
ok_nand_read:
@ verify mov r0, #0 ldr r1, =TEXT_BASE mov r2, #0x400 @ 4 bytes * 1024 = 4K-bytes go_next: ldr r3, [r0], #4 ldr r4, [r1], #4 teq r3, r4 bne notmatch subs r2, r2, #4 beq stack_setup bne go_next
notmatch:
loop3: b loop3 @ infinite loop
#endif
#ifdef CONFIG_S3C2410_NAND_BOOT
#define NAND_CTL_BASE 0x4E000000
/* Offset */ #define oNFCONF 0x00 #define oNFCMD 0x04 #define oNFSTAT 0x10 #define LENGTH_UBOOT 0x40000
@ reset NAND
mov r1, #NAND_CTL_BASE ldr r2, =0xf830 @ initial value str r2, [r1, #oNFCONF] ldr r2, [r1, #oNFCONF] bic r2, r2, #0x800 @ enable chip str r2, [r1, #oNFCONF] mov r2, #0xff @ RESET command strb r2, [r1, #oNFCMD] mov r3, #0 @ wait nand1: add r3, r3, #0x1 cmp r3, #0xa blt nand1
nand2:
ldr r2, [r1, #oNFSTAT] @ wait ready tst r2, #0x1 beq nand2 ldr r2, [r1, #oNFCONF] orr r2, r2, #0x800 @ disable chip str r2, [r1, #oNFCONF] @ get read to call C functions (for nand_read()) ldr sp, DW_STACK_START @ setup stack pointer mov fp, #0 @ no previous frame, so fp=0 @ copy U-Boot to RAM ldr r0, =TEXT_BASE mov r1, #0x0 mov r2, #LENGTH_UBOOT bl nand_read_ll tst r0, #0x0 beq ok_nand_read
bad_nand_read:
loop2: b loop2 @ infinite loop
ok_nand_read:
@ verify mov r0, #0 ldr r1, =TEXT_BASE mov r2, #0x400 @ 4 bytes * 1024 = 4K-bytes go_next: ldr r3, [r0], #4 ldr r4, [r1], #4 teq r3, r4 bne notmatch subs r2, r2, #4 beq stack_setup bne go_next
notmatch:
loop3: b loop3 @ infinite loop
#endif
在
“
_start_armboot: .word start_armboot
”
后加入：
#define STACK_BASE 0x33f00000 #define STACK_SIZE 0x10000 .align 2 DW_STACK_START: .word STACK_BASE+STACK_SIZE-4
2
、
在
board/mini2440
加入
NAND Flash
读取函数（
start.S
中需要的
nand_read_ll
函数）文件
nand_read.c
================================================================== #include <config.h> #include <linux/mtd/nand.h>
#define __REGb(x) (*(volatile unsigned char *)(x))
#define __REGw(x) (*(volatile unsigned short *)(x)) #define __REGi(x) (*(volatile unsigned int *)(x)) #define NF_BASE 0x4e000000 #if defined(CONFIG_S3C2410) #define NFCONF __REGi(NF_BASE + 0x0) #define NFCMD __REGb(NF_BASE + 0x4) #define NFADDR __REGb(NF_BASE + 0x8) #define NFDATA __REGb(NF_BASE + 0xc) #define NFSTAT __REGb(NF_BASE + 0x10) #define NFSTAT_BUSY 1 #define nand_select() (NFCONF &= ~0x800) #define nand_deselect() (NFCONF |= 0x800) #define nand_clear_RnB() do {} while (0) #elif defined(CONFIG_S3C2440) #define NFCONF __REGi(NF_BASE + 0x0) #define NFCONT __REGi(NF_BASE + 0x4) #define NFCMD __REGb(NF_BASE + 0x8) #define NFADDR __REGb(NF_BASE + 0xc) #define NFDATA __REGb(NF_BASE + 0x10) #define NFDATA16 __REGw(NF_BASE + 0x10) #define NFSTAT __REGb(NF_BASE + 0x20) #define NFSTAT_BUSY (1 << 2) #define nand_select() (NFCONT &= ~(1 << 1)) #define nand_deselect() (NFCONT |= (1 << 1)) #define nand_clear_RnB() (NFSTAT |= NFSTAT_BUSY) #endif static inline void nand_wait(void) { int i; while (!(NFSTAT & NFSTAT_BUSY)) for (i=0; i<10; i++); } #if defined(CONFIG_S3C2410) /* configuration for 2410 with 512byte sized flash */ #define NAND_PAGE_SIZE 512 #define BAD_BLOCK_OFFSET 517 #define NAND_BLOCK_MASK (NAND_PAGE_SIZE - 1) #define NAND_BLOCK_SIZE 0x4000 #else /* configuration for 2440 with 2048byte sized flash */ #define NAND_5_ADDR_CYCLE #define NAND_PAGE_SIZE 2048 #define BAD_BLOCK_OFFSET NAND_PAGE_SIZE #define NAND_BLOCK_MASK (NAND_PAGE_SIZE - 1) #define NAND_BLOCK_SIZE (NAND_PAGE_SIZE * 64) #endif /* compile time failure in case of an invalid configuration */ #if defined(CONFIG_S3C2410) && (NAND_PAGE_SIZE != 512) #error "S3C2410 does not support nand page size != 512" #endif static int is_bad_block(unsigned long i) { unsigned char data; unsigned long page_num; /* FIXME: do this twice, for first and second page in block */ nand_clear_RnB(); #if (NAND_PAGE_SIZE == 512) NFCMD = NAND_CMD_READOOB; /* 0x50 */ NFADDR = BAD_BLOCK_OFFSET & 0xf; NFADDR = (i >> 9) & 0xff; NFADDR = (i >> 17) & 0xff; NFADDR = (i >> 25) & 0xff; #elif (NAND_PAGE_SIZE == 2048) page_num = i >> 11; /* addr / 2048 */ NFCMD = NAND_CMD_READ0; NFADDR = BAD_BLOCK_OFFSET & 0xff; NFADDR = (BAD_BLOCK_OFFSET >> 8) & 0xff; NFADDR = page_num & 0xff; NFADDR = (page_num >> 8) & 0xff; NFADDR = (page_num >> 16) & 0xff; NFCMD = NAND_CMD_READSTART; #endif nand_wait(); data = (NFDATA & 0xff); if (data != 0xff) return 1; return 0; } static int nand_read_page_ll(unsigned char *buf, unsigned long addr) { unsigned short *ptr16 = (unsigned short *)buf; unsigned int i, page_num; nand_clear_RnB(); NFCMD = NAND_CMD_READ0; #if (NAND_PAGE_SIZE == 512) /* Write Address */ NFADDR = addr & 0xff; NFADDR = (addr >> 9) & 0xff; NFADDR = (addr >> 17) & 0xff; NFADDR = (addr >> 25) & 0xff; #elif (NAND_PAGE_SIZE == 2048) page_num = addr >> 11; /* addr / 2048 */ /* Write Address */ NFADDR = 0; NFADDR = 0; NFADDR = page_num & 0xff; NFADDR = (page_num >> 8) & 0xff; NFADDR = (page_num >> 16) & 0xff; NFCMD = NAND_CMD_READSTART; #else #error "unsupported nand page size" #endif nand_wait(); for (i = 0; i < NAND_PAGE_SIZE; i++) { *buf = (NFDATA & 0xff); buf++; } return NAND_PAGE_SIZE; }
/* low level nand read function */
int nand_read_ll(unsigned char *buf, unsigned long start_addr, int size) { int i, j; if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) { return -1; /* invalid alignment */ } /* chip Enable */ nand_select(); nand_clear_RnB(); for (i=0; i<10; i++); for (i=start_addr; i < (start_addr + size);) { j = nand_read_page_ll(buf, i); i += j; buf += j; } /* chip Disable */ nand_deselect(); return 0; } ==============================================================
记得修改
board/mini2440/Makefile
文件
,
将
nand_read.c
编译进
u-boot
。
OBJS := mini2440.o nand_read.o flash.o
3
、修改
board/mini2440/lowlevel_init.S
文件
/* REFRESH parameter */ #define REFEN 0x1 /* Refresh enable */ #define TREFMD 0x0 /* CBR(CAS before RAS)/Auto refresh */ #define Trc 0x3 /* 7clk */ #define Tchr 0x2 /* 3clk */
#if defined(CONFIG_S3C2440)
#define Trp 0x2 /* 4clk */ #define REFCNT 1012 #else #define Trp 0x0 /* 2clk */ #define REFCNT 0x0459 #endif 4 、 修改 /board/mini2440/mini2440.c 修改其对 GPIO 和 PLL 的配置 ( 请参阅开发板的硬件说明和芯片手册 ) ；并针对 LCD 显示部分和 nand flash 驱动添加相应的代码： ...... #include <common.h> #include <s3c2410.h> #include <video_fb.h>
#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand.h> #endif
DECLARE_GLOBAL_DATA_PTR;
#define FCLK_SPEED 1
#if FCLK_SPEED==0 /* Fout = 203MHz, Fin = 12MHz for Audio */
#define M_MDIV 0xC3 #define M_PDIV 0x4 #define M_SDIV 0x1 #elif FCLK_SPEED==1 /* Fout = 202.8MHz */
#if defined(CONFIG_S3C2410)
/* Fout = 202.8MHz */ #define M_MDIV 0xA1 #define M_PDIV 0x3 #define M_SDIV 0x1 #endif
#if defined(CONFIG_S3C2440)
/* Fout = 405MHz */ #define M_MDIV 0x7f #define M_PDIV 0x2 #define M_SDIV 0x1 #endif #endif
#define USB_CLOCK 1
#if USB_CLOCK==0
#define U_M_MDIV 0xA1 #define U_M_PDIV 0x3 #define U_M_SDIV 0x1 #elif USB_CLOCK==1
#if defined(CONFIG_S3C2410)
#define U_M_MDIV 0x48 #define U_M_PDIV 0x3 #endif
#if defined(CONFIG_S3C2440)
#define U_M_MDIV 0x38 #define U_M_PDIV 0x2 #endif
#define U_M_SDIV 0x2
#endif ......
为连接
LED
和蜂鸣器的
GPIO
修改配置寄存器：
int board_init (void):
......
#if defined(CONFIG_MINI2440)
gpio->GPBCON = 0x00295551; #else gpio->GPBCON = 0x00044556; #endif ......
为引导
linux
内核，修改开发板的类型代码：
int board_init (void):
......
#if defined(CONFIG_S3C2410)
/* arch number of SMDK2410-Board */ gd->bd->bi_arch_number = MACH_TYPE_SMDK2410; #endif
#if defined(CONFIG_S3C2440)
/* arch number of S3C2440-Board */ gd->bd->bi_arch_number = MACH_TYPE_S3C2440 ; #endif ...... 为使 int board_init (void) 设置完成后， LED1 和 LED2 同时亮起，蜂鸣器继续鸣叫，在 int board_init (void) 的最后添加： ......
icache_enable();
dcache_enable(); #if defined(CONFIG_MINI2440_LED) gpio->GPBDAT = 0x00000181; #endif return 0; }
5、最后，修改
board/mini2440/u-boot.lds
文件，在
本文出自 51CTO.COM技术博客
cpu/arm920t/start.o (.text) 后加上 board/2440/lowlevel_init.o (.text) board/2440/nand_read.o (.text) |