端口映射（port map）

端口映射（port map）

端口映射用来定义实例间的内部连接。
A port map is used to define the interconnection between instances.

语法（Syntax）

port map ( [ 端口名 => ] 设定值, ... )

port map ( [ port_name => ] expression, ... )

说明（Description）

端口映射将结构体中的信号映射到结构体中的实例端口。端口映射在块或者配置中也会出现。
A port map maps signals in an architecture to ports on an instance within that architecture. Port maps can also appear in a block or in a configuration.

连接是位置性关联或者指定的关联。
The connections can be listed via positional association or via named association.

在实例中，端口名是指元件端口或者例化的实体端口，设定值为包含了改实例的结构体中可见的信号。在配置中，端口名为实体的端口，设定值为元件的端口。
Within an instance, the port names are ports on the component or entity being instanced, the expressions are signals visible in the architecture containing the instance. Within a configuration, the port names are ports on the entity, the expressions are ports on the component.

使用指定的关联可以单独对端口组中的元素进行连接。
The elements of an array port can be connected individually when using named association.

使用关键字open可以使端口保留未连接状态。
Ports may be left unconnected using the keyword open.

例程（Example）

architecture Structure of Top is
  component CompA
    generic (...);
    port (Clk, Rst: in std_logic;
          D: in std_logic_vector(3 downto 0);
          Rd : out std_logic;
          Q: out std_logic_vector(3 downto 0));
  end component;
begin
  u1: CompA generic map(...)
            port map(Clock, Reset, DIn, QOut);
  u2: CompA generic map(...)
            port map(Clk => Clock,
                     Rst => Reset,
                     D => DIn,
                     Rd => open,
                     Q(0) => QOut1,
                     Q(3 downto 1) => QOut2);
end Structure;

注释（Notes）

• 端口映射里的转换函数仅能有一个参数
• A conversion function in a port map must have one parameter only.