DSP28069通过SPI总线读AD7928

DSP28069通过SPI总线读AD7928

#define Spi_a (0u)
#define Spi_b (1u)
#define WRITE(n) (n << 11)
#define SEQ(n) (n << 10)
#define ADDR(n) (n << 6)
#define PM(n) (n << 4)
#define SHADOW(n) (n << 3)
#define RANGE(n) (n << 1)
#define CODING(n) (n << 0)
#define MAX_TIME_OUT (48u)

void DealSpiaTask(void)
{
uint16_t SndData=0xFFFFu;
uint16_t i=0u;
uint16_t CtrlReg,Dummy;
if( 1u!= SpiInitFlag)
{
SendSpi_N(Spi_a,&SndData,1u);
SendSpi_N(Spi_a,&SndData,1u);
CtrlReg = WRITE(1)|SEQ(1)|ADDR(7)|PM(3)|SHADOW(1)|RANGE(0)|CODING(1);
SndData = GetSpiaCmdData(CtrlReg);
SendSpi_N(Spi_a,&SndData,1u);
SpiInitFlag = 1u;
}
else
{
CtrlReg = WRITE(0)|SEQ(1)|ADDR(7)|PM(3)|SHADOW(1)|RANGE(0)|CODING(1);
Dummy = GetSpiaCmdData(CtrlReg);
for(i = 0u;i < 8u;i++)
{
ReadSpi_N(Spi_a,&SpiaRcvbuf[i],1u,Dummy);
/Ad_Channel = (SpiRcvbuf[i]>>12)&0x07u;
Ad_Sample = (SpiRcvbuf[i]&0x0FFFu;/
}
}
}
uint16_t GetSpiaCmdData(uint16_t CtrlReg)
{
/Only information provided by the first 12 clock drop edges (after the CS drop edge)
* is loaded into the control register/
return CtrlReg << 4;
}
void SendSpi_N(Uint16 dev,Uint16 *sndbuf,Uint16 cnt)
{
Uint16 i=0,num=cnt,len;
volatile struct SPI_REGS *p;

switch(dev)
{
    case Spi_a:
        p = &SpiaRegs;
    break;
    case Spi_b:
        p = &SpibRegs;
    break;
    default:
        p = &SpiaRegs;
    break;
}

while(num-i >= 4)
{
    p->SPIFFRX.bit.RXFIFORESET = 1;

    p->SPITXBUF = sndbuf[i++];
    p->SPITXBUF = sndbuf[i++];
    p->SPITXBUF = sndbuf[i++];
    p->SPITXBUF = sndbuf[i++];

    while(p->SPIFFRX.bit.RXFFST<4);

    p->SPIFFRX.bit.RXFIFORESET = 0;
}
len = num-i;
p->SPIFFRX.bit.RXFIFORESET = 1;

for(;iSPITXBUF = sndbuf[i++];
}
while(p->SPIFFRX.bit.RXFFST < len);
p->SPIFFRX.bit.RXFIFORESET = 0;
num=0;
p->SPIFFRX.bit.RXFIFORESET = 1;

}

void ReadSpi_N(Uint16 dev,Uint16 *rcvbuf,Uint16 cnt,uint16_t DummyData)
{
Uint16 i=0,j=0u,num=cnt,len;
volatile struct SPI_REGS *p;

switch(dev)
{
    case Spi_a:
        p = &SpiaRegs;
    break;
    case Spi_b:
        p = &SpibRegs;
    break;
    default:
        p = &SpiaRegs;
    break;
}

while(num-i>=4)
{
    p->SPITXBUF = DummyData;
    p->SPITXBUF = DummyData;
    p->SPITXBUF = DummyData;
    p->SPITXBUF = DummyData;

    while(p->SPIFFRX.bit.RXFFST < 4);

    rcvbuf[i++] = p->SPIRXBUF & 0xFFFF;
    rcvbuf[i++] = p->SPIRXBUF & 0xFFFF;
    rcvbuf[i++] = p->SPIRXBUF & 0xFFFF;
    rcvbuf[i++] = p->SPIRXBUF & 0xFFFF;
}

len = num-i;

for(j=0;jSPITXBUF = DummyData;
}
while(p->SPIFFRX.bit.RXFFSTSPIFFRX.bit.RXFFST>0)
{
    rcvbuf[i++] = p->SPIRXBUF & 0xFFFF;
}

}