BufferParams in diplomacy-Parameter.scala

case class BufferParams(depth: Int, flow: Boolean, pipe: Boolean)
{
  require (depth >= 0, "Buffer depth must be >= 0")
  def isDefined = depth > 0
  def latency = if (isDefined && !flow) 1 else 0

  def apply[T <: Data](x: DecoupledIO[T]) =
    if (isDefined) Queue(x, depth, flow=flow, pipe=pipe)
    else x

  def irrevocable[T <: Data](x: ReadyValidIO[T]) =
    if (isDefined) Queue.irrevocable(x, depth, flow=flow, pipe=pipe)
    else x

  def sq[T <: Data](x: DecoupledIO[T]) =
    if (!isDefined) x else {
      val sq = Module(new ShiftQueue(x.bits, depth, flow=flow, pipe=pipe))
      sq.io.enq <> x
      sq.io.deq
    }

  override def toString() = "BufferParams:%d%s%s".format(depth, if (flow) "F" else "", if (pipe) "P" else "")

}

object BufferParams
{
  implicit def apply(depth: Int): BufferParams = BufferParams(depth, false, false)

  val default = BufferParams(2)
  val none    = BufferParams(0)
  val flow    = BufferParams(1, true, false)
  val pipe    = BufferParams(1, false, true)
}
 

阅读笔记摘要：

Default buffer深度为2

ShiftQueue Implements the same interface as chisel3.util.Queue, but uses a shift register internally. It is less energy efficient whenever the queue has more than one entry populated, but is faster on the dequeue side.It is efficient for usually-empty flow-through queues.

• shiftqueue接口与chisel3.util.Queue一致，但是内部实现使用的是移位寄存器。
• 当队列项数超过一项时，能效会比较低，但是出队更快
• 当队列总是为空时效率比较高

关于ReadyValidIO，DecoupledIO，IrrevocableIO的继承关系参考https://www.cnblogs.com/wjcdx/p/10124643.html