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chapter 1
analyze the different application domains from power perspective
technology trends CMOS scaling
design solutions
data center needs air conditioning to remove the dissipated heat
cooling issue processors closer to the floor operate faster than the ones on the top
SoC (Systems-on-a-chip) temperature gradients
higher temperature means slower clock speed.
battery-operated device available energy is fixed
improved electrode structures, better charging technology, advanced battery system design
“Watt nodes” P > 1 W P>1W P>1W
“Milliwatt nodes” 1 m W < P < 1 W 1mW 1mW<P<1W
“Microwatt nodes” P < 1 m W P<1mW P<1mW
to transform the physical energy present in various sources in the environment into electrical power.
average power dissipation: when studying heat-removal and packaging concerns of high-performance processors
peak power dissipation: when designing the complex power supply delivery networks for integrated circuits and systems
up to mid 1990s: the average power dissipation of a processor rose by a factor of four every three years.
after: approximately a factor of 1.4 every three years.
Reason: abandoned the idea of a supply voltage fixed at 5 V.
power density instead of power independent of the actual die size
k k k is the technology scaling factor
clock frequency f f f scales between technology generations as k 2 k^2 k2
power density: p = C V D D 2 f p = C{V_{DD}}^2f p=CVDD2f k p = k × 1 × k 2 = k 3 k_p = k\times1\times k^2 = k^3 kp=k×1×k2=k3
under full-scaling mode
clock frequency scales as k 1.7 k^{1.7} k1.7. k p = k × ( 1 / k ) 2 × k 1.7 = k 0.7 k_p = k\times (1/k)^2 \times k^{1.7} = k^{0.7} kp=k×(1/k)2×k1.7=k0.7
classic wisdom dictates that power densities above 150 W/ c m 2 cm^2 cm2 should be avoided
computing density (computations per unit area and time) : k 3 k^3 k3
dynamic power density : k 1.9 k^{1.9} k1.9
static power density (leakage power density): k 2.7 k^{2.7} k2.7
distribution of power: computation, memory, clock, and interconnect
“power management”
an era of power-limited scaling