mini2440启动代码分析之第十一篇(完结)

ENTER_SLEEP

       ldr r0,=REFRESH

       ldr r1,[r0]              ;r1=rREFRESH

       orr r1, r1, #BIT_SELFREFRESH

       str r1, [r0]             ;Enable SDRAM self-refresh

 

       mov r1,#16                   ;Wait until self-refresh is issued,which may not be needed.

0     subs r1,r1,#1

       bne %B0

 

       ldr   r1,=MISCCR

       ldr   r0,[r1]

       orr   r0,r0,#(7<<17)  ;Set SCLK0=0, SCLK1=0, SCKE=0.

       str    r0,[r1]

 

       ldr r0,=CLKCON          ; Enter sleep mode

       str r2,[r0]

 

       b .                 ;CPU will die here.

 

 WAKEUP_SLEEP;从睡眠状态醒过来

       ;Release SCLKn after wake-up from the SLEEP mode.

       ldr   r1,=MISCCR

       ldr   r0,[r1]

       bic   r0,r0,#(7<<17)  ;SCLK0:0->SCLK, SCLK1:0->SCLK, SCKE:0->=SCKE.

       str    r0,[r1]

 

       ;Set memory control registers

      ldr   r0,=SMRDATA      ;be careful!

       ldr   r1,=BWSCON       ;BWSCON Address

       add  r2, r0, #52      ;End address of SMRDATA

0

       ldr   r3, [r0], #4

       str    r3, [r1], #4

       cmp r2, r0

       bne  %B0

 

       mov r1,#256

0     subs r1,r1,#1   ;1) wait until the SelfRefresh is released.

       bne %B0

 

       ldr r1,=GSTATUS3       ;GSTATUS3 has the start address just after SLEEP wake-up

       ldr r0,[r1]

 

       mov pc,r0

      

;=====================================================================

; Clock division test

; Assemble code, because VSYNC time is very short

;=====================================================================

       EXPORT CLKDIV124

       EXPORT CLKDIV144

      

CLKDIV124

      

       ldr     r0, = CLKDIVN

       ldr     r1, = 0x3         ; 0x3 = 1:2:4

       str     r1, [r0]

;      wait until clock is stable

       nop

       nop

       nop

       nop

       nop

 

       ldr     r0, = REFRESH

       ldr     r1, [r0]

       bic          r1, r1, #0xff

       bic          r1, r1, #(0x7<<8)

       orr          r1, r1, #0x470 ; REFCNT135

       str     r1, [r0]

       nop

       nop

       nop

       nop

       nop

       mov     pc, lr

 

CLKDIV144

       ldr     r0, = CLKDIVN

       ldr     r1, = 0x4         ; 0x4 = 1:4:4

       str     r1, [r0]

;      wait until clock is stable

       nop

       nop

       nop

       nop

       nop

 

       ldr     r0, = REFRESH

       ldr     r1, [r0]

       bic          r1, r1, #0xff

       bic          r1, r1, #(0x7<<8)

       orr          r1, r1, #0x630 ; REFCNT675 - 1520

       str     r1, [r0]

       nop

       nop

       nop

       nop

       nop

       mov     pc, lr

 

       ALIGN;按照一定的规则对齐,^符号相当于伪指令MAP,用于定义一个结构化的内存表的首地址

 

       AREA RamData, DATA, READWRITE

;

        ^  _ISR_STARTADDRESS              ; _ISR_STARTADDRESS=0x33FF_FF00

HandleReset   #   4;符号^ 相当于伪指令MAP,用于定义一个结构化的内存表的首地址

HandleUndef  #   4

HandleSWI    #   4

HandlePabort    #   4

HandleDabort    #   4

HandleReserved  #   4

HandleIRQ            #   4

HandleFIQ            #   4

 

;Do not use the label 'IntVectorTable',

;The value of IntVectorTable is different with the address you think it may be.

;IntVectorTable

;@0x33FF_FF20

HandleEINT0        #   4

HandleEINT1        #   4

HandleEINT2        #   4

HandleEINT3        #   4

HandleEINT4_7     #   4

HandleEINT8_23   #   4

HandleCAM          #   4            ; Added for 2440.

HandleBATFLT      #   4

HandleTICK          #   4

HandleWDT          #   4

HandleTIMER0     #   4

HandleTIMER1     #   4

HandleTIMER2     #   4

HandleTIMER3     #   4

HandleTIMER4     #   4

HandleUART2      #   4

;@0x33FF_FF60

HandleLCD           #   4

HandleDMA0        #   4

HandleDMA1        #   4

HandleDMA2        #   4

HandleDMA3        #   4

HandleMMC          #   4

HandleSPI0           #   4

HandleUART1              #   4

HandleNFCON             #   4            ; Added for 2440.

HandleUSBD         #   4

HandleUSBH         #   4

HandleIIC             #   4

HandleUART0       #   4

HandleSPI1          #   4

HandleRTC           #   4

HandleADC          #   4

;@0x33FF_FFA0

       END


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