PYNQ PL 中断61# IRQ_F2P nFIQ直接接btn测试

PYNQ PL 中断61# IRQ_F2P nFIQ直接接btn测试_第1张图片
PYNQ PL 中断61# IRQ_F2P nFIQ直接接btn测试_第2张图片
constrain

##Buttons

set_property -dict { PACKAGE_PIN D19   IOSTANDARD LVCMOS33 } [get_ports { btn }]; #IO_L4P_T0_35 Sch=btn[0]#set_property -dict { PACKAGE_PIN D20   IOSTANDARD LVCMOS33 } [get_ports { btn[1] }]; #IO_L4N_T0_35 Sch=btn[1]
set_property -dict { PACKAGE_PIN D20   IOSTANDARD LVCMOS33 } [get_ports { btn1 }]; #IO_L9N_T1_DQS_AD3N_35 Sch=btn[2]
 

sdk


#include 
#include "xscugic.h"
#include "xil_exception.h"
#include "xgpiops.h"
#include "xil_printf.h"
XGpioPs Gpio;

#define KEY_INT_ID 61
#define CPU_BASEADDR		XPAR_SCUGIC_CPU_BASEADDR

XScuGic ScuGic;
void irq_handler(void * data) {
	u32 id;
	id = XScuGic_ReadReg(CPU_BASEADDR, XSCUGIC_INT_ACK_OFFSET);
	id = id & XSCUGIC_ACK_INTID_MASK;
	xil_printf("irq ocurr,id:%d\n", id);
	XScuGic_WriteReg(CPU_BASEADDR, XSCUGIC_EOI_OFFSET, id);

}

void fiq_request(void) {
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_FIQ_INT,
			(Xil_ExceptionHandler) irq_handler, (void *) 3);

	Xil_ExceptionEnableMask(XIL_EXCEPTION_ALL);
}

void normal_irq_request() {

	XScuGic_Config* pScuGicCfg;
	pScuGicCfg = XScuGic_LookupConfig(XPAR_SCUGIC_SINGLE_DEVICE_ID);
	XScuGic_CfgInitialize(&ScuGic, pScuGicCfg, pScuGicCfg->CpuBaseAddress);
	XScuGic_Connect(&ScuGic, KEY_INT_ID, (Xil_ExceptionHandler) irq_handler, 0);
	XScuGic_SetPriorityTriggerType(&ScuGic, KEY_INT_ID, 0xA0, 1);
	XScuGic_Enable(&ScuGic, KEY_INT_ID);

	Xil_ExceptionInit();
	Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT,
			(Xil_ExceptionHandler) irq_handler, &ScuGic);

	Xil_ExceptionEnable();


}

int main(void) {
	xil_printf("PL int test\n\r");
	normal_irq_request();
	fiq_request();
	while (1);
	return 0;
}

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