evmc6748_bootloader研究
/* Configures PLL andDDR controller*/
void BL_PLATFORM_Config(void)
{
/* Unlock kickregisters (necessary on C6748) */
0x01C14038
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_KICK0R) =SYSCFG_KICK0R_UNLOCK;
0x01C1403C
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_KICK1R) = SYSCFG_KICK1R_UNLOCK;
0x01C14170
HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_SUSPSRC) &=
SYSCFG_SUSPSRC_I2C0SRC |
SYSCFG_SUSPSRC_UART2SRC |
SYSCFG_SUSPSRC_SPI1SRC|
SYSCFG_SUSPSRC_TIMER64P_0SRC;
……
}
/** \brief Baseaddress of DEV memory mapped registers */
#define SOC_SYSCFG_0_REGS (0x01C14000)
#define SYSCFG0_KICK0R (0x38)
/* Unlock/Lock codefor KICK0 */
#define SYSCFG_KICK0R_UNLOCK (0x83E70B13u)
#define SYSCFG0_KICK1R (0x3C)
/* Unlock/Lock codefor KICK1 */
#define SYSCFG_KICK1R_UNLOCK (0x95A4F1E0u)
#define SYSCFG0_SUSPSRC (0x170)
#defineSYSCFG_SUSPSRC_I2C0SRC (0x00010000u)
#defineSYSCFG_SUSPSRC_UART2SRC (0x00100000u)
#defineSYSCFG_SUSPSRC_SPI1SRC (0x00400000u)
#defineSYSCFG_SUSPSRC_TIMER64P_0SRC (0x08000000u)
TMS320C6748 DSP System
10.5.4 Kick Registers(KICK0R-KICK1R)
TheSYSCFG module has a protection mechanism to prevent any spurious writes fromchanging any of the modules memory-mapped registers. At power-on reset, none of the SYSCFG module registersare writeable (they are readable). To allow writing to the registers in themodule, it is required to“unlock” the registers by writing to two memory-mapped registers in the SYSCFGmodule, Kick0 and Kick1, with exact data values. Once these values arewritten, then all the registers in the SYSCFG module that are writeable can bewritten to. See Section 10.2.2 for the exact key values and sequence of steps. Writing any other data value toeither of these kick registers will cause the memory mapped registers to be “locked”again and block out any write accesses to registers in the SYSCFGmodule.
// Macros for hardwareaccess, both direct and via the bit-band region.
//************************************************************
#define HWREG(x) (*( (volatile unsigned int *)(x) ))
3.1 BootModes
This devicesupports a variety of boot modes through an internal DSP ROM bootloader. This device does notsupport dedicated hardware boot modes; therefore, all boot modes utilize the internal DSP ROM. The input states of theBOOT pins are sampled and latched into the BOOTCFG register, which ispart of the system configuration (SYSCFG) module, when device reset is deasserted.Boot mode selection is determined by the values of the BOOT pins.
See Usingthe TMS320C6748/C6746/C6742 Bootloader (SPRAAT2) for more details on the ROM Boot
Loader.
Thefollowing boot modes are supported:
• NAND Flashboot
– 8-bit NAND
– 16-bit NAND(supported on ROM revisions after d800k002 -- see the bootloader documents
mentioned above to determine the ROM revision)
• NOR Flashboot
– NOR Directboot (8-bit or 16-bit)
– NOR Legacy boot(8-bit or 16-bit)
– NOR AIS boot(8-bit or 16-bit)
• HPI Boot
• I2C0/I2C1Boot
– EEPROM(Master Mode)
– ExternalHost (Slave Mode)
• SPI0/SPI1Boot
– Serial Flash(Master Mode)
– SERIALEEPROM (Master Mode)
– ExternalHost (Slave Mode)
• UART0/UART1/UART2Boot
– ExternalHost
• MMC/SD0 Boot
TMS320C674x/OMAP-L1xProcessor Real-Time Clock (RTC)User's Guide
/*
* \brief This function is used to initializeand configure NAND.
*/
void BL_PLATFORM_NANDSetup(void)
{
/* Pin mux and clock setting */
EMIFAClkConfig();
NANDPinMuxSetup();
}
/**
* \brief This function enables the EMIF modules and clocks on the SoC.
*/
void EMIFAClkConfig(void)
{
/* Power on the EMIFA */
PSCModuleControl(SOC_PSC_0_REGS, HW_PSC_EMIFA, PSC_POWERDOMAIN_ALWAYS_ON,
PSC_MDCTL_NEXT_ENABLE);
}
/**
* \brief This function sets therequested module in the required state
* \param baseAdd Memory address ofthe PSC instance used.
* \param moduleId The module numberof the module to be commanded.
* \param powerDomain The power domainof the module to be commanded.
* \param flags This contains theflags that is a logical OR of the commands that can be given to a module.
* \return 0 in case of successfultransition, -1 otherwise.
*/
int PSCModuleControl(unsigned int baseAdd, unsigned int moduleId,
unsignedint powerDomain, unsigned int flags)
{