HDLbits---Circuits---Sequential Logic---Finite State Machines第四部分
1.Exams/ece2412013q8moduletop_module(inputclk,inputaresetn,//Asynchronousactive-lowresetinputx,outputz);parameterstart=2'b0,one=2'b01,two=2'b10,three=2'b11;reg[1:0]state,next_state;always@(posedgeclko